{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,2,4]],"date-time":"2024-02-04T02:22:46Z","timestamp":1707013366750},"reference-count":16,"publisher":"Walter de Gruyter GmbH","issue":"1","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2011,1,1]]},"abstract":"<jats:title>Blocking and Non-Blocking Process Synchronization: Analysis of Implementation<\/jats:title>\n        <jats:p>\u2014In computer programs with multiple processes, inter-process communication is of high importance. One of its main aspects is process synchronization, which can be divided into two classes: blocking and non-blocking. Blocking synchronization is simpler and mostly used; however, non-blocking synchronization allows avoiding some negative effects. In this paper, there is discussed the logic of widespread process synchronization mechanisms and is analyzed the support of these mechanisms in different platforms.<\/jats:p>","DOI":"10.2478\/v10143-011-0033-2","type":"journal-article","created":{"date-parts":[[2012,2,3]],"date-time":"2012-02-03T03:52:58Z","timestamp":1328241178000},"page":"145-150","source":"Crossref","is-referenced-by-count":3,"title":["Blocking and Non-Blocking Process Synchronization: Analysis of Implementation"],"prefix":"10.2478","volume":"44","author":[{"given":"Vladislav","family":"Nazaruk","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Pavel","family":"Rusakov","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"374","reference":[{"key":"1","volume-title":"Operating System Concepts","author":"A. Silberschatz","year":"2005"},{"key":"2","unstructured":"H. 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Available: <a target=\"_blank\" href='http:\/\/www.cl.cam.ac.uk\/research\/srg\/netos\/lock-free\/'>http:\/\/www.cl.cam.ac.uk\/research\/srg\/netos\/lock-free\/<\/a>"},{"key":"13","unstructured":"\"Intel\u00ae 64 and IA-32 Architectures. Software Developer's Manual. Volume 2A: Instruction Set Reference, A-M\". [Online]. Available: <a target=\"_blank\" href='http:\/\/www3.intel.com\/Assets\/PDF\/manual\/253666.pdf'>http:\/\/www3.intel.com\/Assets\/PDF\/manual\/253666.pdf<\/a>"},{"key":"14","unstructured":"\"AMD64 Technology. AMD64 Architecture. Programmer's Manual. Volume 3: General-Purpose and System Instructions\". [Online]. Available: <a target=\"_blank\" href='http:\/\/support.amd.com\/us\/Processor_TechDocs\/24594.pdf'>http:\/\/support.amd.com\/us\/Processor_TechDocs\/24594.pdf<\/a>"},{"key":"15","unstructured":"\"Evergreen Family Instruction Set Architecture. Instructions and Microcode. Reference Guide\", Advanced Micro Devices, Inc., September 2010. [Online]. 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