{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,3]],"date-time":"2025-10-03T00:50:10Z","timestamp":1759452610071,"version":"build-2065373602"},"reference-count":0,"publisher":"University of Porto","issue":"2","license":[{"start":{"date-parts":[[2025,9,17]],"date-time":"2025-09-17T00:00:00Z","timestamp":1758067200000},"content-version":"unspecified","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["UPjeng"],"abstract":"<jats:p>Conventional power distribution networks (PDNs), in which individual voltage regulators power the entire integrated circuit (IC), are inef-fective for high-power, large-area ICs. In high-performance systems-on-chip (SoCs) and micro-processors (in particular those designed for AI applications), shrinking technology nodes are leading to higher current densities, which im-pose thermal constraints and limit the portion of the chip that can be simultaneously pow-ered (\u201cdark silicon\u201d). PDNs with point-of-load regulation offer a promising alternative. The distributed nature of their design inher-ently relaxes thermal constraints while minimiz-ing high-current routing overhead (IR drops), thereby improving the PDN efficiency. In this work, the concept of on-chip distributed voltage regulation is introduced. Previously reported distributed voltage regulator designs are re-viewed, emphasizing their major achievements and limitations. Then, the challenges that hin-der a more ubiquitous adoption of such designs, namely stability (analysis) and unbalanced load sharing, are discussed. Existing solutions ad-dressing these challenges are also presented. Fi-nally, a comparative analysis of the performance of these regulators is presented, and insights into the future direction of distributed voltage regu-lation are offered.<\/jats:p>","DOI":"10.24840\/2183-6493_011-002_003138","type":"journal-article","created":{"date-parts":[[2025,10,2]],"date-time":"2025-10-02T16:55:27Z","timestamp":1759424127000},"page":"15-39","source":"Crossref","is-referenced-by-count":0,"title":["A Review on Distributed Voltage Regulators for High-Performance Integrated Circuits"],"prefix":"10.24840","volume":"11","author":[{"ORCID":"https:\/\/orcid.org\/0009-0007-0401-7140","authenticated-orcid":false,"given":"Gabriel","family":"Oliveira","sequence":"first","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-7449-8193","authenticated-orcid":false,"given":"C\u00e2ndido","family":"Duarte","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-2091-1165","authenticated-orcid":false,"given":"Marcelino","family":"Santos","sequence":"additional","affiliation":[]},{"given":"Pina","family":"Miguel","sequence":"additional","affiliation":[]}],"member":"10468","published-online":{"date-parts":[[2025,9,17]]},"container-title":["U.Porto Journal of Engineering"],"original-title":[],"link":[{"URL":"https:\/\/journalengineering.fe.up.pt\/index.php\/upjeng\/article\/download\/2183-6493_011-002_003138\/972","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/journalengineering.fe.up.pt\/index.php\/upjeng\/article\/download\/2183-6493_011-002_003138\/972","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,10,2]],"date-time":"2025-10-02T16:55:28Z","timestamp":1759424128000},"score":1,"resource":{"primary":{"URL":"https:\/\/journalengineering.fe.up.pt\/index.php\/upjeng\/article\/view\/2183-6493_011-002_003138"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,9,17]]},"references-count":0,"journal-issue":{"issue":"2","published-online":{"date-parts":[[2025,9,11]]}},"URL":"https:\/\/doi.org\/10.24840\/2183-6493_011-002_003138","relation":{},"ISSN":["2183-6493"],"issn-type":[{"value":"2183-6493","type":"electronic"}],"subject":[],"published":{"date-parts":[[2025,9,17]]}}}