{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,16]],"date-time":"2026-03-16T10:07:58Z","timestamp":1773655678492,"version":"3.50.1"},"reference-count":42,"publisher":"Allerton Press","issue":"6","license":[{"start":{"date-parts":[[2019,11,1]],"date-time":"2019-11-01T00:00:00Z","timestamp":1572566400000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"},{"start":{"date-parts":[[2019,11,1]],"date-time":"2019-11-01T00:00:00Z","timestamp":1572566400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["Aut. Control Comp. Sci."],"published-print":{"date-parts":[[2019,11]]},"DOI":"10.3103\/s014641161906004x","type":"journal-article","created":{"date-parts":[[2020,1,13]],"date-time":"2020-01-13T05:02:58Z","timestamp":1578891778000},"page":"481-491","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":12,"title":["Synthesis of Built-in Self-Test Control Circuits Based on the Method of Boolean Complement\u00a0to Constant-Weight 1-out-of-n Codes"],"prefix":"10.3103","volume":"53","author":[{"given":"D. V.","family":"Efanov","sequence":"first","affiliation":[]},{"given":"V. V.","family":"Sapozhnikov","sequence":"additional","affiliation":[]},{"given":"Vl. V.","family":"Sapozhnikov","sequence":"additional","affiliation":[]},{"given":"D. V.","family":"Pivovarov","sequence":"additional","affiliation":[]}],"member":"1627","published-online":{"date-parts":[[2020,1,13]]},"reference":[{"key":"7150_CR1","volume-title":"Error Detection Circuits","author":"M. Goessel","year":"1994","unstructured":"Goessel, M. and Graf, S., Error Detection Circuits, London: McGraw-Hill, 1994."},{"key":"7150_CR2","volume-title":"Fault-Tolerant Computer System Design","author":"D.K. Pradhan","year":"1996","unstructured":"Pradhan, D.K., Fault-Tolerant Computer System Design, New York: Prentice Hall, 1996."},{"key":"7150_CR3","volume-title":"System-On-Chip Test Architectures: Nanometer Design for Testability","author":"L.-T. Wang","year":"2008","unstructured":"Wang, L.-T., Stroud, C.E., and Touba, N.A., System-On-Chip Test Architectures: Nanometer Design for Testability, Morgan Kaufmann Publishers, 2008."},{"key":"7150_CR4","doi-asserted-by":"publisher","DOI":"10.4018\/978-1-60960-212-3","volume-title":"Design and Test Technology for Dependable Systems-On-Chip","author":"R. Ubar","year":"2011","unstructured":"Ubar, R., Raik, J., and Vierhaus, H.-T., Design and Test Technology for Dependable Systems-On-Chip, New York: IGI Global, 2011."},{"key":"7150_CR5","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-44162-7","volume-title":"Green IT Engineering: Concepts, Models, Complex Systems Architectures","author":"V. Kharchenko","year":"2017","unstructured":"Kharchenko, V., Kondratenko, Yu., and Kacprzyk, J., Green IT Engineering: Concepts, Models, Complex Systems Architectures, Springer, 2017. https:\/\/doi.org\/10.1007\/978-3-319-44162-7"},{"issue":"1","key":"7150_CR6","doi-asserted-by":"publisher","first-page":"19","DOI":"10.1007\/BF00971960","volume":"5","author":"Fadi Y. Busaba","year":"1994","unstructured":"Busaba, F.Y. and Lala, P.K., Self-checking combinational circuit design for single and unidirectional multibit errors, J. Electron Test.: Theory Appl., 1994, no. 1, pp. 19\u201328. https:\/\/doi.org\/10.1007\/BF00971960","journal-title":"Journal of Electronic Testing"},{"key":"7150_CR7","volume-title":"Design of Self-Testing Checkers for Unidirectional Error Detecting Codes","author":"S.J. Piestrak","year":"1995","unstructured":"Piestrak, S.J., Design of Self-Testing Checkers for Unidirectional Error Detecting Codes, Wroclaw: Oficyna Wydawnicza Politechniki Wroclavskiej, 1995."},{"issue":"1\/2","key":"7150_CR8","doi-asserted-by":"publisher","first-page":"7","DOI":"10.1023\/A:1008244815697","volume":"12","author":"M. Nicolaidis","year":"1998","unstructured":"Nicolaidis, M. and Zorian, Y., On-line testing for VLSI\u2014a compendium of approaches, J. Electron. Test.: Theory Appl., 1998, no. 12, pp. 7\u201320. https:\/\/doi.org\/10.1023\/A:1008244815697","journal-title":"Journal of Electronic Testing"},{"key":"7150_CR9","doi-asserted-by":"crossref","unstructured":"Das, D. and Touba, N.A., Weight-based codes and their application to concurrent error detection of multilevel circuits, Proceedings of the 17th IEEE VLSI Test Symposium, USA, CA, Dana Point, April 25\u201329,1999, pp. 370\u2013376.","DOI":"10.1109\/VTEST.1999.766691"},{"key":"7150_CR10","doi-asserted-by":"publisher","first-page":"47","DOI":"10.1155\/2000\/46578","volume":"11","author":"A.Yu. Matrosova","year":"2000","unstructured":"Matrosova, A.Yu., Levin, I., and Ostanin, S.A., Self-checking synchronous FSM network design with low overhead, VLSI Des., 2000, vol. 11, no. 1, pp. 47\u201358. https:\/\/doi.org\/10.1155\/2000\/46578","journal-title":"VLSI Des."},{"key":"7150_CR11","doi-asserted-by":"publisher","unstructured":"Mitra, S. and McCluskey, E.J., Which concurrent error detection scheme to choose?, Proceedings of International Test Conference,2000, Atlantic City, NJ, 2000, pp. 985\u2013994. https:\/\/doi.org\/10.1109\/TEST.2000.894311","DOI":"10.1109\/TEST.2000.894311"},{"key":"7150_CR12","doi-asserted-by":"crossref","unstructured":"Ghosh, S., Basu, S., and Touba, N.A., Synthesis of low power CED circuits based on parity codes, Proceedings of 23rd IEEE VLSI Test Symposium (VTS\u201905), 2005, pp. 315\u2013320.","DOI":"10.1109\/VTS.2005.80"},{"key":"7150_CR13","doi-asserted-by":"publisher","first-page":"64","DOI":"10.1016\/S0019-9958(62)90223-1","volume":"5","author":"C.V. Freiman","year":"1962","unstructured":"Freiman, C.V., Optimal error detection codes for completely asymmetric binary channels, Inf. Control, 1962, vol. 5, no. 1, pp. 64\u201371. https:\/\/doi.org\/10.1016\/S0019-9958(62)90223-1","journal-title":"Inf. Control"},{"key":"7150_CR14","doi-asserted-by":"publisher","first-page":"267","DOI":"10.1007\/BF00971975","volume":"4","author":"E.S. Sogomonyan","year":"1993","unstructured":"Sogomonyan, E.S. and G\u00f6ssel, M., Design of self-testing and on-line fault detection combinational circuits with weakly independent outputs, J. Electron. Test.: Theory Appl., 1993, vol. 4, no. 4, pp. 267\u2013281. https:\/\/doi.org\/10.1007\/BF00971975","journal-title":"J. Electron. Test.: Theory Appl."},{"key":"7150_CR15","doi-asserted-by":"publisher","first-page":"145","DOI":"10.1023\/A:1008344603814","volume":"15","author":"D. Das","year":"1999","unstructured":"Das, D. and Touba, N.A., Synthesis of circuits with low-cost concurrent error detection based on bose-lin codes, J. Electron. Test.: Theory Appl., 1999, vol. 15, nos. 1\u20132, pp. 145\u2013155. https:\/\/doi.org\/10.1023\/A:1008344603814","journal-title":"J. Electron. Test.: Theory Appl."},{"key":"7150_CR16","unstructured":"Sogomonyan, E.S. and Slabakov, E.V., Samoproveryaemye ustroistva i otkazoustoichivye sistemy (Self-Checking Devices and Fail-Safe Systems), Moscow: Radio i svyaz\u2019, 1989."},{"key":"7150_CR17","doi-asserted-by":"publisher","first-page":"1093","DOI":"10.1109\/TC.1978.1675011","volume":"C-27","author":"D.A. Reynolds","year":"1978","unstructured":"Reynolds, D.A. and Metze, G., Fault detection capabilities of alternating logic, IEEE Trans. Comput., 1978, vol.\u00a0C-27, no. 12, pp. 1093\u20131098.","journal-title":"IEEE Trans. Comput."},{"key":"7150_CR18","doi-asserted-by":"publisher","unstructured":"Saposhnikov, Vl.V., Dmitriev, A., Goessel, M., and Saposhnikov, V.V., Self-dual parity checking\u2014a new method for on line testing, Proceedings of 14th IEEE VLSI Test Symposium, Princeton, NJ, 1996, pp. 162\u2013168. https:\/\/doi.org\/10.1109\/VTEST.1996.510852","DOI":"10.1109\/VTEST.1996.510852"},{"key":"7150_CR19","unstructured":"Gessel\u2019, M., Dmitriev, A.V., Sapozhnikov, V.V., and Sapozhnikov, Vl.V., A self-testing structure for functional failure detection in combinational circuits, Avtom. Telemekh., 1999, no. 11, pp. 162\u2013174."},{"key":"7150_CR20","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1155\/2000\/84720","volume":"11","author":"A. Dmitriev","year":"2000","unstructured":"Dmitriev, A., Saposhnikov, V., Saposhnikov, Vl., Goessel, M., Moshanin, V., and Morosov, A., New self-dual circuits for error detection and testing, VLSI Des., 2000, vol. 11, no. 1, pp. 1\u201321. https:\/\/doi.org\/10.1155\/2000\/84720","journal-title":"VLSI Des."},{"key":"7150_CR21","unstructured":"Gessel\u2019, M., Dmitriev, A.V., Sapozhnikov, V.V., and Sapozhnikov, Vl.V., Fault detection in combinational circuits using self-dual control, Avtom. Telemekh., 2000, no. 7, pp. 140\u2013149."},{"key":"7150_CR22","unstructured":"G\u00f6essel, M., Ocheretny, V., Sogomonyan, E., and Marienfeld, D., New Methods of Concurrent Checking, Dordrecht: Springer Science+Business Media B.V., 2008."},{"key":"7150_CR23","doi-asserted-by":"publisher","unstructured":"Goessel, M., Saposhnikov, Vl., Saposhnikov, V., and Dmitriev, A., A new method for concurrent checking by use of a 1-out-of-4 code, Proceedings of the 6th IEEE International On-line Testing Workshop, Palma de Mallorca, 2000, pp. 147\u2013152. https:\/\/doi.org\/10.1109\/OLT.2000.856627","DOI":"10.1109\/OLT.2000.856627"},{"key":"7150_CR24","unstructured":"Saposhnikov, V.V., Morozov, A., Saposhnikov, Vl.V., and Goessel, M., Concurrent checking by use of complementary circuits for 1-out-of-3 codes, 5th International Workshop IEEE DDECS 2002, Brno, 2002."},{"key":"7150_CR25","first-page":"52","volume":"24","author":"V.V. Sapozhnikov","year":"2002","unstructured":"Sapozhnikov, V.V., Sapozhnikov, Vl.V., Dmitriev, A.V., Morozov, A.V., and Gessel\u2019, M., Organization of the functional control of combinational circuits by the method of logical complement, Elektron. Model., 2002, vol.\u00a024, no. 6, pp. 52\u201366.","journal-title":"Elektron. Model."},{"key":"7150_CR26","doi-asserted-by":"publisher","first-page":"153","DOI":"10.1023\/A:1021884727370","volume":"64","author":"M. Gessel","year":"2003","unstructured":"Gessel, M., Morozov, A.V., Sapozhnikov, V.V., and Sapozhnikov, Vl.V., Logic complement, a new method of checking the combinational circuits, Autom. Remote Control, 2003, vol. 64, no. 1, pp. 153\u2013161.","journal-title":"Autom. Remote Control"},{"key":"7150_CR27","doi-asserted-by":"publisher","first-page":"1336","DOI":"10.1007\/s10513-005-0174-2","volume":"66","author":"M. Goessel","year":"2005","unstructured":"Goessel, M., Morozov, A.V., Sapozhnikov, V.V., and Sapozhnikov, Vl.V., Checking combinational circuits by the method of logic complement, Autom. Remote Control, 2005, vol. 66, no. 8, pp. 1336\u20131346.","journal-title":"Autom. Remote Control"},{"key":"7150_CR28","unstructured":"Sen, S.K. and Roy, S.S., An optimized concurrent self-checker using constraint-don\u2019t cares and 1-out-of-4 code, National Conference (AECDISC-2008) in Asansol Engineering College, 2008."},{"key":"7150_CR29","unstructured":"Sen, S.K., A self-checking circuit for concurrent checking by 1-out-of-4 code with design optimization using constraint don\u2019t cares, National Conference on Emerging Trends and Advances in Electrical Engineering and Renewable Energy (NCEEERE 2010), 2010."},{"key":"7150_CR30","unstructured":"Das, D.K., Roy, S.S., Dmitiriev, A., Morozov, A., and G\u00f6ssel, M., Constraint don\u2019t cares for optimizing designs for concurrent checking by 1-out-of-3 codes, Proceedings of the 10th International Workshops on Boolean Problems, Freiberg, September, 2012, pp. 33\u201340."},{"key":"7150_CR31","doi-asserted-by":"publisher","unstructured":"Efanov, D., Sapozhnikov, V., and Sapozhnikov, Vl., Methods of organization of totally self-checking concurrent error detection system on the basis of constant-weight \u201c1-out-of-3\u201d code, Proceedings of 14th IEEE East-West Design & Test Symposium (EWDTS`2016), Yerevan, 2016, pp. 117\u2013125. https:\/\/doi.org\/10.1109\/EWDTS.2016.7807622","DOI":"10.1109\/EWDTS.2016.7807622"},{"key":"7150_CR32","doi-asserted-by":"publisher","first-page":"25","DOI":"10.15407\/emodel.38.06.025","volume":"38","author":"V.V. Sapozhnikov","year":"2016","unstructured":"Sapozhnikov, V.V., Sapozhnikov, Vl.V., and Efanov, D.V., The construction of fully self-checking structures of functional control systems using the constant-weight \u201c1-out-of-3\u201d-code, Elektron. Model., 2016, vol. 38, no. 6, pp. 25\u201343.","journal-title":"Elektron. Model."},{"key":"7150_CR33","doi-asserted-by":"publisher","first-page":"15","DOI":"10.15407\/emodel.39.02.015","volume":"39","author":"V.V. Sapozhnikov","year":"2017","unstructured":"Sapozhnikov, V.V., Sapozhnikov, Vl.V., Efanov, D.V., and Pivovarov, D.V., The logical complement method based on the constant-weight \u201c1-out-of-3\u201d-code for constructing fully self-checking structures of functional control systems, Elektron. Model., 2017, vol. 39, no. 2, pp. 15\u201334.","journal-title":"Elektron. Model."},{"key":"7150_CR34","doi-asserted-by":"publisher","first-page":"524","DOI":"10.17586\/0021-3454-2016-59-7-524-533","volume":"59","author":"V.V. Sapozhnikov","year":"2016","unstructured":"Sapozhnikov, V.V., Sapozhnikov, Vl.V., and Efanov, D.V., The method of functional control of combinational logic devices based on code \u201c2-out-of-4\u201d code, Izv. Vyssh. Uchebn. Zaved.,Priborostr., 2016, vol. 59, no. 7, pp. 524\u2013533. https:\/\/doi.org\/10.17586\/0021-3454-2016-59-7-524-533","journal-title":"Priborostr."},{"key":"7150_CR35","unstructured":"Sapozhnikov, V.V., Sapozhnikov, Vl.V., and Efanov, D.V., The construction of self-checking structures of functional control systems based on the constant-weight \u201c1-out-of-3\u201d-code, Probl. Upr., 2017, no. 1, pp. 57\u201364."},{"key":"7150_CR36","doi-asserted-by":"publisher","unstructured":"Morozov, A., Saposhnikov, V.V., Saposhnikov, Vl.V., and Goessel, M., New self-checking circuits by use of Berger-codes, Proceedings of 6th IEEE International On-Line Testing Workshop, Palma De Mallorca, 2000, pp. 171\u2013176. https:\/\/doi.org\/10.1109\/OLT.2000.856626","DOI":"10.1109\/OLT.2000.856626"},{"key":"7150_CR37","doi-asserted-by":"publisher","first-page":"68","DOI":"10.1016\/S0019-9958(61)80037-5","volume":"4","author":"J.M. Berger","year":"1961","unstructured":"Berger, J.M., A note on error detection codes for asymmetric channels, Inf. Control, 1961, vol. 4, no. 1, pp. 68\u201373. https:\/\/doi.org\/10.1016\/S0019-9958(61)80037-5","journal-title":"Inf. Control"},{"key":"7150_CR38","doi-asserted-by":"crossref","unstructured":"Sapozhnikov, V.V., Sapozhnikov, Vl.V., Efanov, D.V., and Pivovarov, D.V., A method of constructing a functional control system based on logical complement using the constant-weight \u201c1-out-of-5\u201d-code, Radioelektron. Inf., 2017, no. 3, pp. 15\u201322.","DOI":"10.1109\/EWDTS.2017.8110076"},{"key":"7150_CR39","first-page":"130","volume":"4","author":"D.V. Pivovarov","year":"2018","unstructured":"Pivovarov, D.V., Construction of functional control systems for multi-output combinational circuits by the method of logical complement using constant-weight codes, Avtom. Transp., 2018, vol. 4, no. 1, pp. 130\u2013148.","journal-title":"Avtom. Transp."},{"key":"7150_CR40","unstructured":"Carter, W.C., Duke, K.A., and Schneider, P.R., US Patent 747533, 1968."},{"key":"7150_CR41","volume-title":"V., Samoproveryaemye diskretnye ustroistva (Self-Checking Discrete Devices)","author":"V.V. Sapozhnikov","year":"1992","unstructured":"Sapozhnikov, V.V. and Sapozhnikov, Vl.V., Samoproveryaemye diskretnye ustroistva (Self-Checking Discrete Devices), St. Petersburg: Energoatomizdat, 1992."},{"key":"7150_CR42","unstructured":"Aksenova, G.P., Necessary and sufficient conditions for constructing fully verifiable convolution schemes modulo 2, Avtom. Telemekh., 1979, no. 9, pp. 126\u2013135."}],"container-title":["Automatic Control and Computer Sciences"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.3103\/S014641161906004X.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/article\/10.3103\/S014641161906004X","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.3103\/S014641161906004X.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,3,15]],"date-time":"2026-03-15T21:57:56Z","timestamp":1773611876000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.3103\/S014641161906004X"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,11]]},"references-count":42,"journal-issue":{"issue":"6","published-print":{"date-parts":[[2019,11]]}},"alternative-id":["7150"],"URL":"https:\/\/doi.org\/10.3103\/s014641161906004x","relation":{},"ISSN":["0146-4116","1558-108X"],"issn-type":[{"value":"0146-4116","type":"print"},{"value":"1558-108X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2019,11]]},"assertion":[{"value":"31 May 2018","order":1,"name":"received","label":"Received","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"4 February 2019","order":2,"name":"revised","label":"Revised","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"5 February 2019","order":3,"name":"accepted","label":"Accepted","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"13 January 2020","order":4,"name":"first_online","label":"First Online","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"The authors declare that they do not have any conflicts of interest.","order":1,"name":"Ethics","group":{"name":"EthicsHeading","label":"CONFLICTS OF INTEREST"}}]}}