{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,20]],"date-time":"2025-02-20T05:17:01Z","timestamp":1740028621490,"version":"3.37.3"},"reference-count":0,"publisher":"IOS Press","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010]]},"abstract":"<jats:p>One important issue in the evolvable hardware area is speeding up the combinational circuits synthesis. This can be mainly achieved by using genetic programming techniques combined with parallel systems implementations. This paper presents a parallel genetic program for combinational circuits synthesis implemented specifically for an FPGA cluster. This implementation accelerates the computation of the fitness function by a x400 factor. The experiments test the algorithm and the cluster architecture performance in comparison with the Altamira HPC cluster. Results show that the FPGA cluster architecture delivers an interesting high performance for combinational circuit synthesis of systems with more than eight variables. Being able to tune some parameters can greatly help the algorithms to find new optimized implementations in area or speed.<\/jats:p>","DOI":"10.3233\/978-1-60750-530-3-600","type":"book-chapter","created":{"date-parts":[[2025,2,19]],"date-time":"2025-02-19T15:30:51Z","timestamp":1739979051000},"source":"Crossref","is-referenced-by-count":0,"title":["Speeding up combinational synthesis in an FPGA cluster"],"prefix":"10.3233","author":[{"family":"Pedraza C&eacute;sar","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Castillo Javier","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Mart&iacute;nez Jos&eacute; Ignacio","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Huerta Pablo","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Bosque Jos&eacute; Luis","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Cano Javier","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"7437","container-title":["Advances in Parallel Computing","Parallel Computing: From Multicores and GPU's to Petascale"],"original-title":[],"deposited":{"date-parts":[[2025,2,19]],"date-time":"2025-02-19T15:51:36Z","timestamp":1739980296000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.medra.org\/servlet\/aliasResolver?alias=iospressISSNISBN&issn=0927-5452&volume=19&spage=600"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010]]},"references-count":0,"URL":"https:\/\/doi.org\/10.3233\/978-1-60750-530-3-600","relation":{},"ISSN":["0927-5452"],"issn-type":[{"value":"0927-5452","type":"print"}],"subject":[],"published":{"date-parts":[[2010]]}}}