{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,20]],"date-time":"2025-02-20T05:17:27Z","timestamp":1740028647669,"version":"3.37.3"},"reference-count":0,"publisher":"IOS Press","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016]]},"abstract":"<jats:p>This paper outlines our experiences with porting a number of production simulation codes to the Xeon Phi co-processor. Large scale production simulation codes present a challenge for optimisation on any platform, and can be even more problematic for accelerator hardware as the codes contain language operations or functionality that are hard to get good performance from on novel hardware. We present the challenges we have experienced porting two large FORTRAN production codes: GS2 and CP2K. We discuss the strategies, which have proven useful or otherwise, for obtaining good performance on Xeon Phi. We also discuss the reasons why achieving good performance for large-scale codes is problematic.<\/jats:p>","DOI":"10.3233\/978-1-61499-621-7-575","type":"book-chapter","created":{"date-parts":[[2025,2,19]],"date-time":"2025-02-19T15:30:51Z","timestamp":1739979051000},"source":"Crossref","is-referenced-by-count":0,"title":["Experiences Porting Production Codes to Xeon Phi Processors"],"prefix":"10.3233","author":[{"family":"Farsarakis Emmanouil","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Jackson Adrian","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Reid Fiona","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Scott David","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Weiland Mich&egrave;le","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"7437","container-title":["Advances in Parallel Computing","Parallel Computing: On the Road to Exascale"],"original-title":[],"deposited":{"date-parts":[[2025,2,19]],"date-time":"2025-02-19T15:44:32Z","timestamp":1739979872000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.medra.org\/servlet\/aliasResolver?alias=iospressISBN&isbn=978-1-61499-620-0&spage=575&doi=10.3233\/978-1-61499-621-7-575"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016]]},"references-count":0,"URL":"https:\/\/doi.org\/10.3233\/978-1-61499-621-7-575","relation":{},"ISSN":["0927-5452"],"issn-type":[{"value":"0927-5452","type":"print"}],"subject":[],"published":{"date-parts":[[2016]]}}}