{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,20]],"date-time":"2025-02-20T05:16:59Z","timestamp":1740028619698,"version":"3.37.3"},"reference-count":0,"publisher":"IOS Press","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017]]},"abstract":"<jats:p>Moore's law has driven processor development for several decades and has increased the available space for transistors on the area of the processor dies. Despite this increase of space, the operational frequency of the processors has stagnated or is even decreasing, due to energy and thermal constraints. The available transistors are nowadays being used to increase the number of cores, the width of SIMD parallel units, and to integrate adjacent technologies such as memory controllers and network fabric. Except for rare cases, typical applications do not utilize all available resources of large supercomputers. Some parts of the available resources are under-utilized, while others are stressed by the application. Co-scheduling strives to solve this problem by scheduling several applications that demand different components of the same resource. This can lead to a better overall utilization of the system. For effective co-scheduling, however, the execution environment has to provide quality-of-service measures to ensure that applications are not inadvertently influencing each other. Cache Allocation Technology is one of the building blocks to achieve this isolation.<\/jats:p>","DOI":"10.3233\/978-1-61499-730-6-12","type":"book-chapter","created":{"date-parts":[[2025,2,19]],"date-time":"2025-02-19T15:30:51Z","timestamp":1739979051000},"source":"Crossref","is-referenced-by-count":0,"title":["Recent Processor Technologies and Co-Scheduling"],"prefix":"10.3233","author":[{"family":"Klemm Michael","sequence":"additional","affiliation":[]},{"family":"Dahnken Christopher","sequence":"additional","affiliation":[]}],"member":"7437","container-title":["Advances in Parallel Computing","Co-Scheduling of HPC Applications"],"original-title":[],"deposited":{"date-parts":[[2025,2,19]],"date-time":"2025-02-19T15:47:44Z","timestamp":1739980064000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.medra.org\/servlet\/aliasResolver?alias=iospressISBN&isbn=978-1-61499-729-0&spage=12&doi=10.3233\/978-1-61499-730-6-12"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017]]},"references-count":0,"URL":"https:\/\/doi.org\/10.3233\/978-1-61499-730-6-12","relation":{},"ISSN":["0927-5452"],"issn-type":[{"value":"0927-5452","type":"print"}],"subject":[],"published":{"date-parts":[[2017]]}}}