{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,20]],"date-time":"2025-02-20T05:17:54Z","timestamp":1740028674907,"version":"3.37.3"},"reference-count":0,"publisher":"IOS Press","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018]]},"abstract":"<jats:p>In this paper, we investigate how to enhance an existing software-defined framework to reduce overheads and enable the parallel utilization of all the programmable processing resources present in systems that include FPGA-based hardware accelerators. To remove overheads, a new hardware platform is created based on interrupts, which removes spin-locks and frees the processing resources. Additionally, instead of simply using the hardware accelerator to offload a task from the CPU, we propose a scheduler that dynamically distributes the tasks among all the resources to minimize load unbalance. The experimental evaluation shows that the interrupt-based heterogeneous platform increases performance by up 22% while reducing energy requirements by 15%. Additionally, we measure between 50% to 25% reduction in execution time when the CPU cores assist FPGA execution at the same level of energy requirements depending on hardware speed-ups.<\/jats:p>","DOI":"10.3233\/978-1-61499-843-3-677","type":"book-chapter","created":{"date-parts":[[2025,2,19]],"date-time":"2025-02-19T15:30:51Z","timestamp":1739979051000},"source":"Crossref","is-referenced-by-count":0,"title":["Simultaneous Multiprocessing on a FPGA+CPU Heterogeneous System-On-Chip"],"prefix":"10.3233","author":[{"family":"Nunez-Yanez Jose","sequence":"additional","affiliation":[]},{"family":"Hosseinabady Mohammad","sequence":"additional","affiliation":[]},{"family":"Rodr&iacute;guez Andr&eacute;s","sequence":"additional","affiliation":[]},{"family":"Asenjo Rafael","sequence":"additional","affiliation":[]},{"family":"Navarro Angeles","sequence":"additional","affiliation":[]},{"family":"Gran-Tejero Rub&eacute;n","sequence":"additional","affiliation":[]},{"family":"Su&aacute;rez-Gracia Dar&iacute;o","sequence":"additional","affiliation":[]}],"member":"7437","container-title":["Advances in Parallel Computing","Parallel Computing is Everywhere"],"original-title":[],"deposited":{"date-parts":[[2025,2,19]],"date-time":"2025-02-19T15:48:40Z","timestamp":1739980120000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.medra.org\/servlet\/aliasResolver?alias=iospressISBN&isbn=978-1-61499-842-6&spage=677&doi=10.3233\/978-1-61499-843-3-677"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018]]},"references-count":0,"URL":"https:\/\/doi.org\/10.3233\/978-1-61499-843-3-677","relation":{},"ISSN":["0927-5452"],"issn-type":[{"value":"0927-5452","type":"print"}],"subject":[],"published":{"date-parts":[[2018]]}}}