{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,2]],"date-time":"2026-05-02T06:50:59Z","timestamp":1777704659409,"version":"3.51.4"},"reference-count":21,"publisher":"SAGE Publications","issue":"6","license":[{"start":{"date-parts":[[2018,12,24]],"date-time":"2018-12-24T00:00:00Z","timestamp":1545609600000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/journals.sagepub.com\/page\/policies\/text-and-data-mining-license"}],"content-domain":{"domain":["journals.sagepub.com"],"crossmark-restriction":true},"short-container-title":["Journal of Intelligent &amp; Fuzzy Systems"],"published-print":{"date-parts":[[2018,12,24]]},"abstract":"<jats:p>Fractional order proportional, Integral and a derivative controller is a special kind of controller which is used to regulate the output voltage of a class of sepic converter to the desired level. Tuning of fractional Proportional, Integral and Derivative controller (FOPID) is achieved by different metaheuristic algorithm and the optimization performance target is chosen as minimizing the integral square error (ISE). This paper presents a performance analysis of Single Ended Primary Inductance Converter (SEPIC) by time response specifications such as rise time, settling time and steady-state error and further, the results are compared with the controllers designed by Genetic Algorithm (GA), Particle Swarm Optimization (PSO) and Queen Bee based Genetic Algorithm (QBGA). The design and implementation of fractional order controller for a closed loop control of converter is done by utilizing a MATLAB\/SIMULINK environment. Results show that QBGA algorithm exhibit better performance as compared to other optimization technique for voltage mode controller in terms of disturbance rejection.<\/jats:p>","DOI":"10.3233\/jifs-171892","type":"journal-article","created":{"date-parts":[[2018,12,24]],"date-time":"2018-12-24T12:46:35Z","timestamp":1545655595000},"page":"6269-6276","update-policy":"https:\/\/doi.org\/10.1177\/sage-journals-update-policy","source":"Crossref","is-referenced-by-count":2,"title":["Fractional order controller design for SEPIC converter using metaheuristic algorithm"],"prefix":"10.1177","volume":"35","author":[{"given":"R.","family":"Senthilkumar","sequence":"first","affiliation":[{"name":"Department of Electrical and Electronics Engineering, Vimal Jyothi Engineering College, Kannur, India"}]},{"given":"G.","family":"Justin Sunil Dhas","sequence":"additional","affiliation":[{"name":"Department of Electrical and Electronics Engineering, Vimal Jyothi Engineering College, Kannur, India"}]}],"member":"179","published-online":{"date-parts":[[2018,12,24]]},"reference":[{"key":"e_1_3_1_2_2","first-page":"520","article-title":"Duijsen, Large signal and small signal modeling techniques for AC-AC power converters","author":"Bauer P.","year":"1993","unstructured":"BauerP., vanP.J. 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