{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,31]],"date-time":"2025-12-31T15:35:15Z","timestamp":1767195315405,"version":"3.48.0"},"reference-count":32,"publisher":"MDPI AG","issue":"1","license":[{"start":{"date-parts":[[2025,12,30]],"date-time":"2025-12-30T00:00:00Z","timestamp":1767052800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Cryptography"],"abstract":"<jats:p>Side-channel attacks leveraging microarchitectural components such as caches and translation lookaside buffers (TLBs) pose increasing risks to cryptographic and machine-learning workloads. This paper presents a comparative study of performance and side-channel leakage under two page-size configurations\u2014standard 4 KB pages and 2 MB huge pages\u2014using paired attacker\u2013victim experiments instrumented with both Performance Monitoring Unit (PMU) counters and precise per-access timing using rdtscp(). The victim executes repeated, key-dependent memory accesses across eight cryptographic modes (AES, ChaCha20, RSA, and ECC variants) while the attacker records eight PMU features per access (cpu-cycles, instructions, cache-references, cache-misses, etc.) and precise rdtscp() timing. The resulting traces are analyzed using a multilayer perceptron classifier to quantify key-dependent leakage. Results show that the 2 MB huge-page configuration achieves a comparable key-classification accuracy (mean 0.79 vs. 0.77 for 4 KB) while reducing average CPU cycles by approximately 11%. Page-index identification remains near random chance (3.6\u20133.7% for PMU side-channels and 1.5% for timing side-channel), indicating no increase in measurable leakage at the page level. These findings suggest that huge-page mappings can improve runtime efficiency without amplifying observable side-channel vulnerabilities, offering a practical configuration for balancing performance and security in user-space cryptographic workloads.<\/jats:p>","DOI":"10.3390\/cryptography10010003","type":"journal-article","created":{"date-parts":[[2025,12,31]],"date-time":"2025-12-31T15:05:01Z","timestamp":1767193501000},"page":"3","update-policy":"https:\/\/doi.org\/10.3390\/mdpi_crossmark_policy","source":"Crossref","is-referenced-by-count":0,"title":["Large Pages, Large Leaks? Hugepage-Induced Side-Channels vs. Performance Improvements in Cryptographic Computations"],"prefix":"10.3390","volume":"10","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-6649-9225","authenticated-orcid":false,"given":"Xinyao","family":"Li","sequence":"first","affiliation":[{"name":"Department of Electrical and Computer Engineering, Iowa State University, Ames, IA 50010, USA"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-2101-3594","authenticated-orcid":false,"given":"Akhilesh","family":"Tyagi","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, Iowa State University, Ames, IA 50010, USA"}]}],"member":"1968","published-online":{"date-parts":[[2025,12,30]]},"reference":[{"key":"ref_1","doi-asserted-by":"crossref","unstructured":"Bhattacharjee, A. (2013, January 7\u201311). Large-reach memory management unit caches. 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