{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,2]],"date-time":"2026-01-02T07:32:06Z","timestamp":1767339126144,"version":"build-2065373602"},"reference-count":17,"publisher":"MDPI AG","issue":"2","license":[{"start":{"date-parts":[[2022,5,30]],"date-time":"2022-05-30T00:00:00Z","timestamp":1653868800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Cryptography"],"abstract":"<jats:p>Side channel attacks provide an effective way to extract secret information from the execution of cryptographic algorithms run on a variety of computing devices. One of the crucial steps for a side channel attack to succeed is the capability to locate the time instant in which the cryptographic primitive being attacked is effectively leaking information on the side channel itself, and synchronize the data obtained from the measurements on that instant. In this work, we propose an efficient and effective solution relying on the digital signal processing technique known as matched filters. We derive our matched filter with a small amount of profiling information which can be obtained from a device matching the one under attack. Our technique reliably identifies the cryptographic operation being computed, even when system interrupts or software multithreading are enabled on our target platform. We validate our approach through a successful attack against an unprotected AES implementation running on a Cortex-M4-based microcontroller.<\/jats:p>","DOI":"10.3390\/cryptography6020026","type":"journal-article","created":{"date-parts":[[2022,5,31]],"date-time":"2022-05-31T00:25:12Z","timestamp":1653956712000},"page":"26","update-policy":"https:\/\/doi.org\/10.3390\/mdpi_crossmark_policy","source":"Crossref","is-referenced-by-count":2,"title":["Locating Side Channel Leakage in Time through Matched Filters"],"prefix":"10.3390","volume":"6","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-0840-6358","authenticated-orcid":false,"given":"Alessandro","family":"Barenghi","sequence":"first","affiliation":[{"name":"Department of Electronics, Information and Bioengineering (DEIB), Politecnico di Milano, 32, 20133 Milan, Italy"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Gioele","family":"Falcetti","sequence":"additional","affiliation":[{"name":"Department of Electronics, Information and Bioengineering (DEIB), Politecnico di Milano, 32, 20133 Milan, Italy"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3812-5429","authenticated-orcid":false,"given":"Gerardo","family":"Pelosi","sequence":"additional","affiliation":[{"name":"Department of Electronics, Information and Bioengineering (DEIB), Politecnico di Milano, 32, 20133 Milan, Italy"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"1968","published-online":{"date-parts":[[2022,5,30]]},"reference":[{"key":"ref_1","doi-asserted-by":"crossref","first-page":"54","DOI":"10.1109\/MSP.2018.1331033","article-title":"IoT Goes Nuclear: Creating a Zigbee Chain Reaction","volume":"16","author":"Ronen","year":"2018","journal-title":"IEEE Secur. Priv."},{"key":"ref_2","doi-asserted-by":"crossref","unstructured":"Randolph, M., and Diehl, W. (2020). Power Side-Channel Attack Analysis: A Review of 20 Years of Study for the Layman. Cryptography, 4.","DOI":"10.3390\/cryptography4020015"},{"key":"ref_3","doi-asserted-by":"crossref","unstructured":"Moradi, A., Barenghi, A., Kasper, T., and Paar, C. (2011, January 17\u201321). On the vulnerability of FPGA bitstream encryption against power analysis attacks: Extracting keys from xilinx Virtex-II FPGAs. Proceedings of the 18th ACM Conference on Computer and Communications Security, CCS 2011, Chicago, IL, USA.","DOI":"10.1145\/2046707.2046722"},{"key":"ref_4","doi-asserted-by":"crossref","first-page":"53","DOI":"10.1007\/s13389-014-0087-5","article-title":"Synchronous sampling and clock recovery of internal oscillators for side channel analysis and fault injection","volume":"5","author":"Chen","year":"2015","journal-title":"J. Cryptogr. Eng."},{"key":"ref_5","doi-asserted-by":"crossref","first-page":"599","DOI":"10.1007\/978-3-662-48324-4_30","article-title":"DPA, Bitslicing and Masking at 1 GHz","volume":"Volume 9293","author":"Handschuh","year":"2015","journal-title":"Proceedings of the Cryptographic Hardware and Embedded Systems-CHES 2015\u201417th International Workshop"},{"key":"ref_6","doi-asserted-by":"crossref","unstructured":"Barenghi, A., and Pelosi, G. (2018, January 24\u201329). Side-channel security of superscalar CPUs: Evaluating the impact of micro-architectural features. Proceedings of the 55th Annual Design Automation Conference, DAC 2018, San Francisco, CA, USA.","DOI":"10.1109\/DAC.2018.8465784"},{"key":"ref_7","doi-asserted-by":"crossref","unstructured":"Frieslaar, I., and Irwin, B. (2016, January 21\u201324). Investigating Multi-Thread Utilization as a Software Defence Mechanism Against Side Channel Attacks. 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