{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,10]],"date-time":"2026-04-10T21:40:53Z","timestamp":1775857253362,"version":"3.50.1"},"reference-count":144,"publisher":"MDPI AG","issue":"4","license":[{"start":{"date-parts":[[2023,11,1]],"date-time":"2023-11-01T00:00:00Z","timestamp":1698796800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Cryptography"],"abstract":"<jats:p>Field-programmable gate arrays (FPGAs) have firmly established themselves as dynamic platforms for the implementation of physical unclonable functions (PUFs). Their intrinsic reconfigurability and profound implications for enhancing hardware security make them an invaluable asset in this realm. This groundbreaking study not only dives deep into the universe of FPGA-based PUF designs but also offers a comprehensive overview coupled with a discerning comparative analysis. PUFs are the bedrock of device authentication and key generation and the fortification of secure cryptographic protocols. Unleashing the potential of FPGA technology expands the horizons of PUF integration across diverse hardware systems. We set out to understand the fundamental ideas behind PUF and how crucially important it is to current security paradigms. Different FPGA-based PUF solutions, including static, dynamic, and hybrid systems, are closely examined. Each design paradigm is painstakingly examined to reveal its special qualities, functional nuances, and weaknesses. We closely assess a variety of performance metrics, including those related to distinctiveness, reliability, and resilience against hostile threats. We compare various FPGA-based PUF systems against one another to expose their unique advantages and disadvantages. This study provides system designers and security professionals with the crucial information they need to choose the best PUF design for their particular applications. Our paper provides a comprehensive view of the functionality, security capabilities, and prospective applications of FPGA-based PUF systems. The depth of knowledge gained from this research advances the field of hardware security, enabling security practitioners, researchers, and designers to make wise decisions when deciding on and implementing FPGA-based PUF solutions.<\/jats:p>","DOI":"10.3390\/cryptography7040055","type":"journal-article","created":{"date-parts":[[2023,11,2]],"date-time":"2023-11-02T02:05:07Z","timestamp":1698890707000},"page":"55","update-policy":"https:\/\/doi.org\/10.3390\/mdpi_crossmark_policy","source":"Crossref","is-referenced-by-count":23,"title":["FPGA-Based PUF Designs: A Comprehensive Review and Comparative Analysis"],"prefix":"10.3390","volume":"7","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-3681-2791","authenticated-orcid":false,"given":"Kusum","family":"Lata","sequence":"first","affiliation":[{"name":"Department of Electronics and Communication Engineering, The LNM Institute of Information Technology, Jaipur 302031, India"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-1023-2118","authenticated-orcid":false,"given":"Linga Reddy","family":"Cenkeramaddi","sequence":"additional","affiliation":[{"name":"Department of Information and Communication Technology, University of Agder, 4879 Grimstad, Norway"}]}],"member":"1968","published-online":{"date-parts":[[2023,11,1]]},"reference":[{"key":"ref_1","doi-asserted-by":"crossref","first-page":"146","DOI":"10.1016\/j.comnet.2014.11.008","article-title":"Security, Privacy and Trust in Internet of Things: The Road Ahead","volume":"76","author":"Sicari","year":"2015","journal-title":"Comput. Netw."},{"key":"ref_2","unstructured":"Radomirovic, S. (2010, January 29). Towards a Model for Security and Privacy in the Internet of Things. Proceedings of the First International Workshop on the Security of the Internet of Things, Tokyo, Japan."},{"key":"ref_3","doi-asserted-by":"crossref","unstructured":"Wurm, J., Hoang, K., Arias, O., Sadeghi, A.-R., and Jin, Y. (2016, January 25\u201328). Security Analysis on Consumer and Industrial IoT Devices. Proceedings of the 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC), Macao, China.","DOI":"10.1109\/ASPDAC.2016.7428064"},{"key":"ref_4","doi-asserted-by":"crossref","unstructured":"Shrouf, F., Ordieres, J., and Miragliotta, G. (2014, January 9\u201312). Smart Factories in Industry 4.0: A Review of the Concept and of Energy Management Approached in Production Based on the Internet of Things Paradigm. Proceedings of the 2014 IEEE International Conference on Industrial Engineering and Engineering Management, Selangor, Malaysia.","DOI":"10.1109\/IEEM.2014.7058728"},{"key":"ref_5","doi-asserted-by":"crossref","first-page":"102514","DOI":"10.1016\/j.sysarc.2022.102514","article-title":"A Survey on Silicon PUFs","volume":"127","author":"Zerrouki","year":"2022","journal-title":"J. Syst. Archit."},{"key":"ref_6","doi-asserted-by":"crossref","first-page":"2026","DOI":"10.1126\/science.1074376","article-title":"Physical One-Way Functions","volume":"297","author":"Pappu","year":"2002","journal-title":"Science"},{"key":"ref_7","doi-asserted-by":"crossref","unstructured":"Gassend, B., Clarke, D., van Dijk, M., and Devadas, S. (2002, January 18\u201322). Silicon Physical Random Functions. Proceedings of the 9th ACM Conference on Computer and Communications Security, Washington, DC, USA.","DOI":"10.1145\/586110.586132"},{"key":"ref_8","doi-asserted-by":"crossref","first-page":"424","DOI":"10.1109\/TDSC.2018.2832201","article-title":"Building PUF Based Authentication and Key Exchange Protocol for IoT Without Explicit CRPs in Verifier Database","volume":"16","author":"Chatterjee","year":"2019","journal-title":"IEEE Trans. Dependable Secur. Comput."},{"key":"ref_9","doi-asserted-by":"crossref","unstructured":"Suh, G.E., and Devadas, S. (2007, January 4\u20138). Physical Unclonable Functions for Device Authentication and Secret Key Generation. Proceedings of the 44th Annual Design Automation Conference, San Diego, CA, USA.","DOI":"10.1109\/DAC.2007.375043"},{"key":"ref_10","doi-asserted-by":"crossref","first-page":"2457","DOI":"10.1109\/TDSC.2021.3059454","article-title":"PUF-RAKE: A PUF-Based Robust and Lightweight Authentication and Key Establishment Protocol","volume":"19","author":"Qureshi","year":"2021","journal-title":"IEEE Trans. Dependable Secur. Comput."},{"key":"ref_11","doi-asserted-by":"crossref","first-page":"364","DOI":"10.1109\/TVLSI.2018.2877438","article-title":"Efficient PUF-Based Key Generation in FPGAs Using Per-Device Configuration","volume":"27","author":"Usmani","year":"2019","journal-title":"IEEE Trans. Very Large Scale Integr. (VLSI) Syst."},{"key":"ref_12","doi-asserted-by":"crossref","first-page":"209","DOI":"10.1109\/OJCOMS.2023.3234338","article-title":"High-Rate Secret Key Generation Using Physical Layer Security and Physical Unclonable Functions","volume":"4","author":"Assaf","year":"2023","journal-title":"IEEE Open J. Commun. Soc."},{"key":"ref_13","doi-asserted-by":"crossref","unstructured":"Prouff, E., and Schaumont, P. (2012, January 9\u201312). PUFKY: A Fully Functional PUF-Based Cryptographic Key Generator. Proceedings of the Cryptographic Hardware and Embedded Systems\u2014CHES 2012, Leuven, Belgium.","DOI":"10.1007\/978-3-642-33027-8"},{"key":"ref_14","doi-asserted-by":"crossref","unstructured":"Anchana, U.K., Mogireddy, M., Kadavergu, E., and Singh, S. (2023, January 5\u20137). Design of PUF Based Chaotic Random Number Generator. Proceedings of the 2023 Second International Conference on Electrical, Electronics, Information and Communication Technologies (ICEEICT), Trichirappalli, India.","DOI":"10.1109\/ICEEICT56924.2023.10157913"},{"key":"ref_15","doi-asserted-by":"crossref","unstructured":"Dheeraj, A., Das, P., Kumar, K., Kalanadhabhatta, S., and Acharyya, A. (2022, January 5\u20138). Modeling Attacks Resilient Multiple PUF-CPRNG Architecture Design Methodology. Proceedings of the 2022 IEEE 35th International System-on-Chip Conference (SOCC), Belfast, UK.","DOI":"10.1109\/SOCC56010.2022.9908089"},{"key":"ref_16","doi-asserted-by":"crossref","first-page":"1740","DOI":"10.1109\/TVLSI.2020.2979269","article-title":"PUF-Based Secure Chaotic Random Number Generator Design Methodology","volume":"28","author":"Kalanadhabhatta","year":"2020","journal-title":"IEEE Trans. Very Large Scale Integr. (VLSI) Syst."},{"key":"ref_17","first-page":"17","article-title":"D-PUF: An Intrinsically Reconfigurable DRAM PUF for Device Authentication and Random Number Generation","volume":"17","author":"Sutar","year":"2017","journal-title":"ACM Trans. Embed. Comput. Syst."},{"key":"ref_18","doi-asserted-by":"crossref","first-page":"1","DOI":"10.1145\/3301307","article-title":"Combining PUF with RLUTs: A Two-Party Pay-per-Device IP Licensing Scheme on FPGAs","volume":"18","author":"Roy","year":"2019","journal-title":"ACM Trans. Embed. Comput. Syst."},{"key":"ref_19","doi-asserted-by":"crossref","unstructured":"Paillier, P., and Verbauwhede, I. (2007, January 10\u201313). FPGA Intrinsic PUFs and Their Use for IP Protection. Proceedings of the Cryptographic Hardware and Embedded Systems\u2014CHES 2007, Vienna, Austria.","DOI":"10.1007\/978-3-540-74735-2"},{"key":"ref_20","doi-asserted-by":"crossref","unstructured":"Suragani, R., Nazarenko, E., Anagnostopoulos, N.A., Mexis, N., and Kavun, E.B. (2022, January 27\u201330). Identification and Classification of Corrupted PUF Responses via Machine Learning. Proceedings of the 2022 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), McLean, VA, USA.","DOI":"10.1109\/HOST54066.2022.9839919"},{"key":"ref_21","doi-asserted-by":"crossref","first-page":"37","DOI":"10.1109\/TETC.2014.2300635","article-title":"Robust and Reverse-Engineering Resilient PUF Authentication and Key-Exchange by Substring Matching","volume":"2","author":"Rostami","year":"2014","journal-title":"IEEE Trans. Emerg. Top. Comput."},{"key":"ref_22","doi-asserted-by":"crossref","first-page":"8547","DOI":"10.1109\/JIOT.2022.3202265","article-title":"PLAKE: PUF-Based Secure Lightweight Authentication and Key Exchange Protocol for IoT","volume":"10","author":"Roy","year":"2023","journal-title":"IEEE Internet Things J."},{"key":"ref_23","doi-asserted-by":"crossref","unstructured":"Sun, D.-Z., Gao, Y.-N., and Tian, Y. (2023). On the Security of a PUF-Based Authentication and Key Exchange Protocol for IoT Devices. Sensors, 23.","DOI":"10.3390\/s23146559"},{"key":"ref_24","doi-asserted-by":"crossref","first-page":"1","DOI":"10.1145\/3005346","article-title":"CDTA: A Comprehensive Solution for Counterfeit Detection, Traceability, and Authentication in the IoT Supply Chain","volume":"22","author":"Yang","year":"2017","journal-title":"ACM Trans. Des. Autom. Electron. Syst."},{"key":"ref_25","doi-asserted-by":"crossref","first-page":"107593","DOI":"10.1016\/j.comnet.2020.107593","article-title":"A Survey on Physical Unclonable Function (PUF)-Based Security Solutions for Internet of Things","volume":"183","author":"Shamsoshoara","year":"2020","journal-title":"Comput. Netw."},{"key":"ref_26","doi-asserted-by":"crossref","unstructured":"Yalli, J.S., and Hasan, M.H. (2023, January 23\u201325). A Unique PUF Authentication Protocol Based Fuzzy Logic Categorization for Internet of Things (IOT) Devices. Proceedings of the 2023 12th International Conference on Software and Computer Applications, Kuantan, Malaysia.","DOI":"10.1145\/3587828.3587865"},{"key":"ref_27","doi-asserted-by":"crossref","unstructured":"Babaei, A., and Schiele, G. (2019). Physical Unclonable Functions in the Internet of Things: State of the Art and Open Challenges. Sensors, 19.","DOI":"10.3390\/s19143208"},{"key":"ref_28","first-page":"314","article-title":"Physical Unclonable Functions (PUF) for IoT Devices","volume":"55","year":"2023","journal-title":"ACM Comput. Surv."},{"key":"ref_29","unstructured":"(2023, July 31). Knowmade Physical Unclonable Functions for Securing Our Digital World. Available online: https:\/\/www.knowmade.com\/technology-news\/semiconductor-news\/memory-news\/physical-unclonable-functions-pufs-a-short-review-of-innovators-who-are-making-the-digital-revolution-more-secure\/."},{"key":"ref_30","unstructured":"(2023, August 12). Physically Unclonable Function\u2014PUF Solution. Available online: https:\/\/www.secure-ic.com\/products\/issp\/security-ip\/key-management\/puf-ip\/."},{"key":"ref_31","unstructured":"(2023, August 17). FPGA Industry Worth $19.1 Billion by 2028. Available online: https:\/\/www.marketsandmarkets.com\/PressReleases\/fpga.asp."},{"key":"ref_32","doi-asserted-by":"crossref","unstructured":"Anandakumar, N.N., Hashmi, M.S., and Sanadhya, S.K. (2017, January 7\u201311). Compact Implementations of FPGA-Based PUFs with Enhanced Performance. Proceedings of the 2017 30th International Conference on VLSI Design and 2017 16th International Conference on Embedded Systems (VLSID), Hyderabad, India.","DOI":"10.1109\/VLSID.2017.7"},{"key":"ref_33","doi-asserted-by":"crossref","first-page":"103180","DOI":"10.1016\/j.micpro.2020.103180","article-title":"Efficient and Lightweight FPGA-Based Hybrid PUFs with Improved Performance","volume":"77","author":"Anandakumar","year":"2020","journal-title":"Microprocess. Microsyst."},{"key":"ref_34","first-page":"570","article-title":"FPGA-Based True Random Number Generation Using Programmable Delays in Oscillator-Rings","volume":"67","author":"Sanadhya","year":"2020","journal-title":"IEEE Trans. Circuits Syst. II Express Briefs"},{"key":"ref_35","doi-asserted-by":"crossref","first-page":"38","DOI":"10.1109\/MPOT.2015.2490261","article-title":"Everything You Wanted to Know About PUFs","volume":"36","author":"Joshi","year":"2017","journal-title":"IEEE Potentials"},{"key":"ref_36","doi-asserted-by":"crossref","first-page":"664","DOI":"10.1007\/s11390-014-1458-1","article-title":"A Survey on Silicon PUFs and Recent Advances in Ring Oscillator PUFs","volume":"29","author":"Zhang","year":"2014","journal-title":"J. Comput. Sci. Technol."},{"key":"ref_37","unstructured":"(2023, October 23). Strong PUFs: Models, Constructions, and Security Proofs|SpringerLink. Available online: https:\/\/link.springer.com\/chapter\/10.1007\/978-3-642-14452-3_4."},{"key":"ref_38","doi-asserted-by":"crossref","first-page":"103","DOI":"10.1109\/MDAT.2016.2544845","article-title":"PUFs as Promising Tools for Security in Internet of Things","volume":"33","author":"Mukhopadhyay","year":"2016","journal-title":"IEEE Des. Test"},{"key":"ref_39","unstructured":"Thampi, S.M., Wang, G., Rawat, D.B., Ko, R., and Fan, C.-I. (2020, January 14\u201317). A Survey of Security Attacks on Silicon Based Weak PUF Architectures. Proceedings of the Security in Computing and Communications, Chennai, India."},{"key":"ref_40","doi-asserted-by":"crossref","unstructured":"Wachsmann, C., and Sadeghi, A.-R. (2015). Physically Unclonable Functions (PUFs): Applications, Models, and Future Directions, Springer International Publishing.","DOI":"10.1007\/978-3-031-02344-6"},{"key":"ref_41","unstructured":"Gassend, B., Clarke, D., van Dijk, M., and Devadas, S. (2023, October 23). Controlled Physical Unknown Functions: Applications to Secure Smartcards and Certified Execution. Available online: https:\/\/api.semanticscholar.org\/CorpusID:9153005."},{"key":"ref_42","doi-asserted-by":"crossref","unstructured":"Sirisuk, P., Morgan, F., El-Ghazawi, T., and Amano, H. (2010, January 17\u201319). An Analysis of Delay Based PUF Implementations on FPGA. Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, Bangkok, Thailand.","DOI":"10.1007\/978-3-642-12133-3"},{"key":"ref_43","unstructured":"Morozov, S., Maiti, A., and Schaumont, P. (2023, October 23). A Comparative Analysis of Delay Based PUF Implementations on FPGA. Available online: https:\/\/eprint.iacr.org\/2009\/629."},{"key":"ref_44","doi-asserted-by":"crossref","unstructured":"Zhang, J., Wu, Q., Lyu, Y., Zhou, Q., Cai, Y., Lin, Y., and Qu, G. (2013, January 16\u201318). Design and Implementation of a Delay-Based PUF for FPGA IP Protection. Proceedings of the 2013 International Conference on Computer-Aided Design and Computer Graphics, Guangzhou, China.","DOI":"10.1109\/CADGraphics.2013.22"},{"key":"ref_45","unstructured":"Lee, J.W., Lim, D., Gassend, B., Suh, G.E., van Dijk, M., and Devadas, S. (2004, January 17\u201319). A Technique to Build a Secret Key in Integrated Circuits for Identification and Authentication Applications. Proceedings of the 2004 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.04CH37525), Honolulu, HI, USA."},{"key":"ref_46","doi-asserted-by":"crossref","first-page":"33979","DOI":"10.1109\/ACCESS.2023.3264016","article-title":"Arbiter PUF\u2014A Review of Design, Composition, and Security Aspects","volume":"11","author":"Hemavathy","year":"2023","journal-title":"IEEE Access"},{"key":"ref_47","doi-asserted-by":"crossref","unstructured":"Jeena Jacob, I., Kolandapalayam Shanmugam, S., Piramuthu, S., and Falkowski-Gilski, P. (2020, January 8\u20139). Designing of Arbiter PUF for Securing IP and IoT Devices. Proceedings of the Data Intelligence and Cognitive Informatics, Tirunelveli, India.","DOI":"10.1007\/978-981-15-8530-2"},{"key":"ref_48","doi-asserted-by":"crossref","unstructured":"Shariffuddin, S.k., Sivamangai, N.M., Napolean, A., Naveenkumar, R., Kamalnath, S., and Saranya, G. (2022, January 21\u201322). Review on Arbiter Physical Unclonable Function and Its Implementation in FPGA for IoT Security Applications. Proceedings of the 2022 6th International Conference on Devices, Circuits and Systems (ICDCS), Coimbatore, India.","DOI":"10.1109\/ICDCS54290.2022.9780766"},{"key":"ref_49","doi-asserted-by":"crossref","first-page":"129832","DOI":"10.1109\/ACCESS.2022.3228635","article-title":"Implementation of Efficient XOR Arbiter PUF on FPGA With Enhanced Uniqueness and Security","volume":"10","author":"Anandakumar","year":"2022","journal-title":"IEEE Access"},{"key":"ref_50","doi-asserted-by":"crossref","unstructured":"G\u00fcneysu, T., and Handschuh, H. (2015, January 13\u201316). The Gap Between Promise and Reality: On the Insecurity of XOR Arbiter PUFs. Proceedings of the Cryptographic Hardware and Embedded Systems\u2014CHES 2015, Saint-Malo, France.","DOI":"10.1007\/978-3-662-48324-4"},{"key":"ref_51","doi-asserted-by":"crossref","unstructured":"Avvaru, S.V.S., and Parhi, K.K. (2019, January 9\u201311). Feed-Forward XOR PUFs: Reliability and Attack-Resistance Analysis. Proceedings of the 2019 on Great Lakes Symposium on VLSI, Tysons Corner, VA, USA.","DOI":"10.1145\/3299874.3318019"},{"key":"ref_52","doi-asserted-by":"crossref","first-page":"2485","DOI":"10.1109\/TIFS.2020.2968113","article-title":"Homogeneous and Heterogeneous Feed-Forward XOR Physical Unclonable Functions","volume":"15","author":"Avvaru","year":"2020","journal-title":"IEEE Trans. Inf. Forensics Secur."},{"key":"ref_53","doi-asserted-by":"crossref","unstructured":"Maiti, A., Casarona, J., McHale, L., and Schaumont, P. (2010, January 13\u201314). A Large Scale Characterization of RO-PUF. Proceedings of the 2010 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST), Anaheim, CA, USA.","DOI":"10.1109\/HST.2010.5513108"},{"key":"ref_54","doi-asserted-by":"crossref","unstructured":"Huang, Z., Bian, J., Lin, Y., Liang, H., and Ni, T. (2023). Design Guidelines and Feedback Structure of Ring Oscillator PUF for Performance Improvement. IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., Early Access.","DOI":"10.1109\/TCAD.2023.3301386"},{"key":"ref_55","doi-asserted-by":"crossref","unstructured":"Mart\u00ednez-Rodr\u00edguez, M.C., Rojas-Mu\u00f1oz, L.F., Camacho-Ruiz, E., S\u00e1nchez-Solano, S., and Brox, P. (2022). Efficient RO-PUF for Generation of Identifiers and Keys in Resource-Constrained Embedded Systems. Cryptography, 6.","DOI":"10.20944\/preprints202209.0129.v1"},{"key":"ref_56","doi-asserted-by":"crossref","first-page":"375","DOI":"10.1007\/s00145-010-9088-4","article-title":"Improved Ring Oscillator PUF: An FPGA-Friendly Secure Primitive","volume":"24","author":"Maiti","year":"2011","journal-title":"J. Cryptol."},{"key":"ref_57","doi-asserted-by":"crossref","unstructured":"Gao, M., Lai, K., and Qu, G. (2014, January 1\u20135). A Highly Flexible Ring Oscillator PUF. Proceedings of the 51st Annual Design Automation Conference, San Francisco, CA, USA.","DOI":"10.1145\/2593069.2593072"},{"key":"ref_58","doi-asserted-by":"crossref","unstructured":"Mangard, S., and Standaert, F.-X. (2010, January 17\u201320). The Glitch PUF: A New Delay-PUF Architecture Exploiting Glitch Shapes. Proceedings of the Cryptographic Hardware and Embedded Systems, CHES 2010, Santa Barbara, CA, USA.","DOI":"10.1007\/978-3-642-15031-9"},{"key":"ref_59","doi-asserted-by":"crossref","unstructured":"(2023, October 23). Glitch PUF: Extracting Information from Usually Unwanted Glitches. Available online: https:\/\/www.jstage.jst.go.jp\/article\/transfun\/E95.A\/1\/E95.A_1_223\/_article.","DOI":"10.1587\/transfun.E95.A.223"},{"key":"ref_60","doi-asserted-by":"crossref","unstructured":"Nozaki, Y., Takemoto, S., Ikezaki, Y., and Yoshikawa, M. (2021, January 21). Performance Evaluation of Unrolled Cipher Based Glitch PUF Implemented on Virtex-7. Proceedings of the 2021 International Symposium on Devices, Circuits and Systems (ISDCS), Higashihiroshima, Japan.","DOI":"10.1109\/ISDCS52006.2021.9397891"},{"key":"ref_61","doi-asserted-by":"crossref","unstructured":"Chen, Q., Csaba, G., Lugli, P., Schlichtmann, U., and R\u00fchrmair, U. (2011, January 5\u20136). The Bistable Ring PUF: A New Architecture for Strong Physical Unclonable Functions. Proceedings of the 2011 IEEE International Symposium on Hardware-Oriented Security and Trust, San Diego, CA, USA. Available online: https:\/\/ieeexplore.ieee.org\/document\/5955011.","DOI":"10.1109\/HST.2011.5955011"},{"key":"ref_62","doi-asserted-by":"crossref","unstructured":"Yamamoto, D., Takenaka, M., Sakiyama, K., and Torii, N. (2014, January 7\u201310). Security Evaluation of Bistable Ring PUFs on FPGAs Using Differential and Linear Analysis. Proceedings of the 2014 Federated Conference on Computer Science and Information Systems, Warsaw, Poland.","DOI":"10.15439\/2014F122"},{"key":"ref_63","unstructured":"Chen, Q., Csaba, G., Lugli, P., Schlichtmann, U., and R\u00fchrmair, U. (2012, January 12\u201316). Characterization of the Bistable Ring PUF. Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE), Dresden, Germany."},{"key":"ref_64","unstructured":"Mangard, S., and Schaumont, P. (2015, January 23\u201324). Security Evaluation and Enhancement of Bistable Ring PUFs. Proceedings of the Radio Frequency Identification, New York, NY, USA."},{"key":"ref_65","doi-asserted-by":"crossref","unstructured":"Hori, Y., Kang, H., Katashita, T., and Satoh, A. (December, January 30). Pseudo-LFSR PUF: A Compact, Efficient and Reliable Physical Unclonable Function. Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, Cancun, Mexico.","DOI":"10.1109\/ReConFig.2011.72"},{"key":"ref_66","doi-asserted-by":"crossref","first-page":"144","DOI":"10.1016\/j.vlsi.2019.12.002","article-title":"Implementation of Pseudo-Linear Feedback Shift Register-Based Physical Unclonable Functions on Silicon and Sufficient Challenge\u2013Response Pair Acquisition Using Built-In Self-Test before Shipping","volume":"71","author":"Ogasahara","year":"2020","journal-title":"Integration"},{"key":"ref_67","doi-asserted-by":"crossref","unstructured":"Zhou, T., Ji, Y., Chen, M., and Li, Y. (2020, January 12\u201314). PL-MRO PUF: High Speed Pseudo-LFSR PUF Based on Multiple Ring Oscillators. Proceedings of the 2020 IEEE International Symposium on Circuits and Systems (ISCAS), Seville, Spain.","DOI":"10.1109\/ISCAS45731.2020.9180582"},{"key":"ref_68","doi-asserted-by":"crossref","unstructured":"Bautista Adames, I.A., Das, J., and Bhanja, S. (2016, January 18\u201320). Survey of Emerging Technology Based Physical Unclonable Funtions. Proceedings of the 26th Edition on Great Lakes Symposium on VLSI, Boston, MA, USA.","DOI":"10.1145\/2902961.2903044"},{"key":"ref_69","unstructured":"(2023, September 27). Physically Unclonable Functions: A Study on the State of the Art and Future Research Directions|SpringerLink. Available online: https:\/\/link.springer.com\/chapter\/10.1007\/978-3-642-14452-3_1."},{"key":"ref_70","unstructured":"Maes, R., Tuyls, P., and Verbauwhede, I. (2008, January 13\u201314). Intrinsic PUFs from Flip-Flops on Reconfigurable Devices. Proceedings of the 3rd Benelux Workshop on Information and System Security (WIS-Sec2008), Eindhoven, The Netherlands."},{"key":"ref_71","unstructured":"(2023, September 27). Improved Reliability of FPGA-Based PUF Identification Generator Design|ACM Transactions on Reconfigurable Technology and Systems. Available online: https:\/\/dl.acm.org\/doi\/abs\/10.1145\/3053681."},{"key":"ref_72","doi-asserted-by":"crossref","unstructured":"Kumar, S.S., Guajardo, J., Maes, R., Schrijen, G.-J., and Tuyls, P. (2008, January 9). Extended Abstract: The Butterfly PUF Protecting IP on Every FPGA. Proceedings of the 2008 IEEE International Workshop on Hardware-Oriented Security and Trust, Anaheim, CA, USA.","DOI":"10.1109\/HST.2008.4559053"},{"key":"ref_73","doi-asserted-by":"crossref","first-page":"20170551","DOI":"10.1587\/elex.14.20170551","article-title":"A Highly Reliable Butterfly PUF in SRAM-Based FPGAs","volume":"14","author":"Xu","year":"2017","journal-title":"IEICE Electron. Express"},{"key":"ref_74","unstructured":"(2023, October 23). Design of Hybrid Strong PUF Circuit against Machine Learning Attacks. Available online: https:\/\/journal.ecust.edu.cn\/article\/doi\/10.14135\/j.cnki.1006-3080.20221009003?pageType=en."},{"key":"ref_75","unstructured":"Cao, R., and Mei, N. (2014). A Fpga Hybrid Cro Puf Based on Three-State Gate for Improving Reliability and Hardware Overhead. Arab. Econ. Bus. J., 1\u20136."},{"key":"ref_76","doi-asserted-by":"crossref","first-page":"012033","DOI":"10.1088\/1742-6596\/2312\/1\/012033","article-title":"FPGA Implementation of Programmable Hybrid PUF Using Butterfly and Arbiter PUF Concepts","volume":"2312","author":"Devika","year":"2022","journal-title":"J. Phys. Conf. Ser."},{"key":"ref_77","unstructured":"Khoshroo, S. (2013). Electronic Thesis and Dissertation Repository, University of Western Ontario."},{"key":"ref_78","doi-asserted-by":"crossref","unstructured":"Sahoo, D.P., Mukhopadhyay, D., and Chakraborty, R.S. (2013, January 9\u201311). Design of Low Area-Overhead Ring Oscillator PUF with Large Challenge Space. Proceedings of the 2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig), Cancun, Mexico. Available online: https:\/\/ieeexplore.ieee.org\/document\/6732277.","DOI":"10.1109\/ReConFig.2013.6732277"},{"key":"ref_79","doi-asserted-by":"crossref","unstructured":"Wu, Z., Patel, H., Sachdev, M., and Tripunitara, M.V. (2019, January 4\u20137). Strengthening PUFs Using Composition. Proceedings of the 2019 IEEE\/ACM International Conference on Computer-Aided Design (ICCAD), Westminster, CO, USA.","DOI":"10.1109\/ICCAD45719.2019.8942176"},{"key":"ref_80","doi-asserted-by":"crossref","unstructured":"Sahoo, D.P., Saha, S., Mukhopadhyay, D., Chakraborty, R.S., and Kapoor, H. (2014, January 6\u20137). Composite PUF: A New Design Paradigm for Physically Unclonable Functions on FPGA. Proceedings of the 2014 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST), Arlington, VA, USA.","DOI":"10.1109\/HST.2014.6855567"},{"key":"ref_81","doi-asserted-by":"crossref","first-page":"e864812","DOI":"10.1155\/2015\/864812","article-title":"A New Arbiter PUF for Enhancing Unpredictability on FPGA","volume":"2015","author":"Machida","year":"2015","journal-title":"Sci. World J."},{"key":"ref_82","doi-asserted-by":"crossref","unstructured":"Alamro, M.A., Zhuang, Y., Aseeri, A.O., and Alkatheiri, M.S. (2019, January 9\u201312). Examination of Double Arbiter PUFs on Security against Machine Learning Attacks. Proceedings of the 2019 IEEE International Conference on Big Data (Big Data), Los Angeles, CA, USA.","DOI":"10.1109\/BigData47090.2019.9006041"},{"key":"ref_83","doi-asserted-by":"crossref","unstructured":"Alamro, M.A., Mursi, K.T., Zhuang, Y., Alkatheiri, M.S., and Aseeri, A.O. (2020, January 10\u201313). Does Sophisticating Double Arbiter PUF Design Ensure Its Security? Performance and Security Assessments on 5-1 DAPUF. Proceedings of the 2020 IEEE International Conference on Big Data (Big Data), Atlanta, GA, USA.","DOI":"10.1109\/BigData50022.2020.9378194"},{"key":"ref_84","first-page":"103543","article-title":"Modeling and Physical Attack Resistant Authentication Protocol with Double PUFs","volume":"76","author":"Hou","year":"2023","journal-title":"J. Inf. Secur. Appl."},{"key":"ref_85","doi-asserted-by":"crossref","unstructured":"Daimi, K. (2018). Computer and Network Security Essentials, Springer International Publishing.","DOI":"10.1007\/978-3-319-58424-9"},{"key":"ref_86","doi-asserted-by":"crossref","unstructured":"Xin, X., Kaps, J.P., and Gaj, K. (September, January 31). A Configurable Ring-Oscillator-Based PUF for Xilinx FPGAs. Proceedings of the 2011 14th Euromicro Conference on Digital System Design, Oulu, Finland. Available online: https:\/\/ieeexplore.ieee.org\/abstract\/document\/6037472.","DOI":"10.1109\/DSD.2011.88"},{"key":"ref_87","doi-asserted-by":"crossref","unstructured":"Sklavos, N., Chaves, R., Di Natale, G., and Regazzoni, F. (2017). Hardware Security and Trust, Springer International Publishing.","DOI":"10.1007\/978-3-319-44318-8"},{"key":"ref_88","doi-asserted-by":"crossref","first-page":"22311","DOI":"10.1109\/ACCESS.2022.3153359","article-title":"Compact SRAM-Based PUF Chip Employing Body Voltage Control Technique","volume":"10","author":"Nam","year":"2022","journal-title":"IEEE Access"},{"key":"ref_89","doi-asserted-by":"crossref","unstructured":"Miskelly, J., Gu, C., Ma, Q., Cui, Y., Liu, W., and O\u2019Neill, M. (2018, January 19\u201321). Modelling Attack Analysis of Configurable Ring Oscillator (CRO) PUF Designs. Proceedings of the 2018 IEEE 23rd International Conference on Digital Signal Processing (DSP), Shanghai, China. Available online: https:\/\/ieeexplore.ieee.org\/abstract\/document\/8631638.","DOI":"10.1109\/ICDSP.2018.8631638"},{"key":"ref_90","doi-asserted-by":"crossref","first-page":"1334","DOI":"10.1109\/TCAD.2015.2448677","article-title":"A Case of Lightweight PUF Constructions: Cryptanalysis and Machine Learning Attacks","volume":"34","author":"Sahoo","year":"2015","journal-title":"IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."},{"key":"ref_91","doi-asserted-by":"crossref","unstructured":"Athanas, P., Pnevmatikatos, D., and Sklavos, N. (2013). Embedded Systems Design with FPGAs, Springer.","DOI":"10.1007\/978-1-4614-1362-2"},{"key":"ref_92","doi-asserted-by":"crossref","first-page":"653","DOI":"10.1007\/s10836-022-06034-7","article-title":"Design and Evaluation of XOR Arbiter Physical Unclonable Function and Its Implementation on FPGA in Hardware Security Applications","volume":"38","author":"Naveenkumar","year":"2022","journal-title":"J. Electron. Test"},{"key":"ref_93","doi-asserted-by":"crossref","first-page":"72","DOI":"10.1145\/3517813","article-title":"Design and Analysis of FPGA-Based PUFs with Enhanced Performance for Hardware-Oriented Security","volume":"18","author":"Anandakumar","year":"2022","journal-title":"J. Emerg. Technol. Comput. Syst."},{"key":"ref_94","first-page":"26","article-title":"Implementation, Characterization and Application of Path Changing Switch Based Arbiter PUF on FPGA as a Lightweight Security Primitive for IoT","volume":"27","author":"Mahalat","year":"2021","journal-title":"ACM Trans. Des. Autom. Electron. Syst."},{"key":"ref_95","doi-asserted-by":"crossref","first-page":"4831","DOI":"10.32604\/cmc.2023.034981","article-title":"MCRO-PUF: A Novel Modified Crossover RO-PUF with an Ultra-Expanded CRP Space","volume":"74","author":"Rabiei","year":"2022","journal-title":"CMC"},{"key":"ref_96","doi-asserted-by":"crossref","unstructured":"Dang, T.-K., Serrano, R., Hoang, T.-T., and Pham, C.-K. (2022, January 19\u201322). A Novel Ring Oscillator PUF for FPGA Based on Feedforward Ring Oscillators. Proceedings of the 2022 19th International SoC Design Conference (ISOCC), Gangneung-si, Republic of Korea.","DOI":"10.1109\/ISOCC56007.2022.10031300"},{"key":"ref_97","doi-asserted-by":"crossref","unstructured":"Merli, D., Stumpf, F., and Eckert, C. (2010, January 24). Improving the Quality of Ring Oscillator PUFs on FPGAs. Proceedings of the 5th Workshop on Embedded Systems Security, Scottsdale, Arizona.","DOI":"10.1145\/1873548.1873557"},{"key":"ref_98","doi-asserted-by":"crossref","unstructured":"Lee, S., Oh, M.-K., Kang, Y., and Choi, D. (2018, January 17\u201319). Implementing a Phase Detection Ring Oscillator PUF on FPGA. Proceedings of the 2018 International Conference on Information and Communication Technology Convergence (ICTC), Jeju, Republic of Korea.","DOI":"10.1109\/ICTC.2018.8539624"},{"key":"ref_99","doi-asserted-by":"crossref","unstructured":"Choudhury, M., Pundir, N., Niamat, M., and Mustapa, M. (2017, January 6\u20139). Analysis of a Novel Stage Configurable ROPUF Design. Proceedings of the 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS), Boston, MA, USA.","DOI":"10.1109\/MWSCAS.2017.8053080"},{"key":"ref_100","doi-asserted-by":"crossref","first-page":"14452","DOI":"10.1109\/JIOT.2021.3090475","article-title":"CT PUF: Configurable Tristate PUF Against Machine Learning Attacks for IoT Security","volume":"9","author":"Zhang","year":"2022","journal-title":"IEEE Internet Things J."},{"key":"ref_101","doi-asserted-by":"crossref","unstructured":"Sahoo, D.P., Chakraborty, R.S., and Mukhopadhyay, D. (2015, January 26\u201328). Towards Ideal Arbiter PUF Design on Xilinx FPGA: A Practitioner\u2019s Perspective. Proceedings of the 2015 Euromicro Conference on Digital System Design, Madeira, Portugal. Available online: https:\/\/ieeexplore.ieee.org\/abstract\/document\/7302326\/.","DOI":"10.1109\/DSD.2015.51"},{"key":"ref_102","doi-asserted-by":"crossref","unstructured":"Hori, Y., Yoshida, T., Katashita, T., and Satoh, A. (2010, January 13\u201315). Quantitative and Statistical Performance Evaluation of Arbiter Physical Unclonable Functions on FPGAs. Proceedings of the 2010 International Conference on Reconfigurable Computing and FPGAs, Cancun, Mexico.","DOI":"10.1109\/ReConFig.2010.24"},{"key":"ref_103","doi-asserted-by":"crossref","unstructured":"Habib, B., Gaj, K., and Kaps, J.-P. (2013, January 4\u20136). FPGA PUF Based on Programmable LUT Delays. Proceedings of the 2013 Euromicro Conference on Digital System Design, Los Alamitos, CA, USA.","DOI":"10.1109\/DSD.2013.79"},{"key":"ref_104","doi-asserted-by":"crossref","first-page":"2198","DOI":"10.1109\/TVLSI.2011.2173770","article-title":"An FPGA Chip Identification Generator Using Configurable Ring Oscillators","volume":"20","author":"Yu","year":"2011","journal-title":"IEEE Trans. Very Large Scale Integr. (VLSI) Syst."},{"key":"ref_105","doi-asserted-by":"crossref","first-page":"711","DOI":"10.1109\/TMSCS.2018.2877737","article-title":"Frequency Offset-Based Ring Oscillator Physical Unclonable Function","volume":"4","author":"Zhang","year":"2018","journal-title":"IEEE Trans. Multi-Scale Comput. Syst."},{"key":"ref_106","first-page":"100055","article-title":"Fault-Tolerant Reversible Logic Gate-Based RO-PUF Design","volume":"4","author":"Karmakar","year":"2023","journal-title":"Mem. Mater. Devices Circuits Syst."},{"key":"ref_107","doi-asserted-by":"crossref","first-page":"371","DOI":"10.1016\/j.vlsi.2018.04.017","article-title":"Improving Performance of FPGA-Based SR-Latch PUF Using Transient Effect Ring Oscillator and Programmable Delay Lines","volume":"62","author":"Ardakani","year":"2018","journal-title":"Integration"},{"key":"ref_108","doi-asserted-by":"crossref","unstructured":"Sano, K., Soudris, D., H\u00fcbner, M., and Diniz, P.C. (2015, January 13\u201317). Efficient SR-Latch PUF. Proceedings of the Applied Reconfigurable Computing, Bochum, Germany.","DOI":"10.1007\/978-3-319-16214-0"},{"key":"ref_109","doi-asserted-by":"crossref","first-page":"5699","DOI":"10.1109\/TIE.2016.2570720","article-title":"Analysis and Evaluation of PUF-Based SoC Designs for Security Applications","volume":"63","author":"Stanciu","year":"2016","journal-title":"IEEE Trans. Ind. Electron."},{"key":"ref_110","doi-asserted-by":"crossref","first-page":"113595","DOI":"10.1016\/j.microrel.2020.113595","article-title":"A Symmetric D Flip-Flop Based PUF with Improved Uniqueness","volume":"106","author":"Khan","year":"2020","journal-title":"Microelectron. Reliab."},{"key":"ref_111","unstructured":"(2023, September 26). FLEX PUF: A Flexible Physical Unclonable Function Design Using Configurable Templates. Available online: https:\/\/www.researchsquare.com."},{"key":"ref_112","first-page":"827","article-title":"Physically Unclonable Function Using an Initial Waveform of Ring Oscillators","volume":"64","author":"Tanamoto","year":"2017","journal-title":"IEEE Trans. Circuits Syst. II Express Briefs"},{"key":"ref_113","doi-asserted-by":"crossref","unstructured":"Ma, Q., Gu, C., Hanley, N., Wang, C., Liu, W., and O\u2019Neill, M. (2018, January 22\u201325). A Machine Learning Attack Resistant Multi-PUF Design on FPGA. Proceedings of the 2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC), Jeju, Republic of Korea.","DOI":"10.1109\/ASPDAC.2018.8297289"},{"key":"ref_114","doi-asserted-by":"crossref","first-page":"1853","DOI":"10.1109\/TETC.2019.2935465","article-title":"A Flip-Flop Based Arbiter Physical Unclonable Function (APUF) Design with High Entropy and Uniqueness for FPGA Implementation","volume":"9","author":"Gu","year":"2021","journal-title":"IEEE Trans. Emerg. Top. Comput."},{"key":"ref_115","doi-asserted-by":"crossref","first-page":"4349","DOI":"10.1109\/TCAD.2022.3197539","article-title":"CaPUF: Cascaded PUF Structure for Machine Learning Resiliency","volume":"41","author":"Nassar","year":"2022","journal-title":"IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."},{"key":"ref_116","doi-asserted-by":"crossref","unstructured":"Reddy Jeeru, D., Panduranga Vittal, K., Anikethan, H.V.U., and Kumar, A.S. (2019, January 26\u201327). Implementation of Enhanced Parallel Port Interface for Frequency Analysis in a Configurable Ring Oscillator PUF Circuits on Xilinx Spartan 3E Architecture. Proceedings of the 2019 IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT), Bangalore, India.","DOI":"10.1109\/CONECCT47791.2019.9012874"},{"key":"ref_117","doi-asserted-by":"crossref","first-page":"4433","DOI":"10.1109\/TCAD.2022.3197696","article-title":"FLAM-PUF: A Response\u2013Feedback-Based Lightweight Anti-Machine-Learning-Attack PUF","volume":"41","author":"Wu","year":"2022","journal-title":"IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."},{"key":"ref_118","doi-asserted-by":"crossref","first-page":"280","DOI":"10.1109\/TCSI.2022.3217992","article-title":"A Highly Stable Physically Unclonable Function Using Algorithm-Based Mismatch Hardening Technique in 28-Nm CMOS","volume":"70","author":"Yang","year":"2023","journal-title":"IEEE Trans. Circuits Syst. I Regul. Pap."},{"key":"ref_119","doi-asserted-by":"crossref","unstructured":"Gao, Y., Su, Y., Yang, W., Chen, S., Nepal, S., and Ranasinghe, D.C. (2019, January 11\u201315). Building Secure SRAM PUF Key Generators on Resource Constrained Devices. Proceedings of the 2019 IEEE International Conference on Pervasive Computing and Communications Workshops (PerCom Workshops), Kyoto, Japan.","DOI":"10.1109\/PERCOMW.2019.8730781"},{"key":"ref_120","doi-asserted-by":"crossref","first-page":"889","DOI":"10.1109\/TCAD.2014.2370531","article-title":"Helper Data Algorithms for PUF-Based Key Generation: Overview and Analysis","volume":"34","author":"Delvaux","year":"2015","journal-title":"IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."},{"key":"ref_121","doi-asserted-by":"crossref","first-page":"40150","DOI":"10.1109\/ACCESS.2022.3165284","article-title":"Helper Data Masking for Physically Unclonable Function-Based Key Generation Algorithms","volume":"10","author":"Afghah","year":"2022","journal-title":"IEEE Access"},{"key":"ref_122","doi-asserted-by":"crossref","unstructured":"Zhang, J., Ding, L., Chen, Z., Li, W., and Qu, G. (2022, January 10\u201314). DA PUF: Dual-State Analog PUF. Proceedings of the 59th ACM\/IEEE Design Automation Conference, San Francisco, CA, USA.","DOI":"10.1145\/3489517.3530412"},{"key":"ref_123","doi-asserted-by":"crossref","first-page":"78","DOI":"10.1145\/3588435","article-title":"CBDC-PUF: A Novel Physical Unclonable Function Design Framework Utilizing Configurable Butterfly Delay Chain Against Modeling Attack","volume":"28","author":"Liu","year":"2023","journal-title":"ACM Trans. Des. Autom. Electron. Syst."},{"key":"ref_124","doi-asserted-by":"crossref","first-page":"403","DOI":"10.1109\/TC.2017.2749226","article-title":"A Multiplexer-Based Arbiter PUF Composition with Enhanced Reliability and Security","volume":"67","author":"Sahoo","year":"2018","journal-title":"IEEE Trans. Comput."},{"key":"ref_125","doi-asserted-by":"crossref","first-page":"2138","DOI":"10.1109\/TCAD.2019.2962115","article-title":"Approximation Attacks on Strong PUFs","volume":"39","author":"Shi","year":"2020","journal-title":"IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."},{"key":"ref_126","doi-asserted-by":"crossref","first-page":"288","DOI":"10.1109\/TCSI.2020.3028508","article-title":"Set-Based Obfuscation for Strong PUFs against Machine Learning Attacks","volume":"68","author":"Zhang","year":"2021","journal-title":"IEEE Trans. Circuits Syst. I Regul. Pap."},{"key":"ref_127","doi-asserted-by":"crossref","first-page":"1137","DOI":"10.1109\/TIFS.2015.2400413","article-title":"A PUF-FSM Binding Scheme for FPGA IP Protection and Pay-Per-Device Licensing","volume":"10","author":"Zhang","year":"2015","journal-title":"IEEE Trans. Inf. Forensics Secur."},{"key":"ref_128","doi-asserted-by":"crossref","unstructured":"Zheng, J.X., and Potkonjak, M. (2014, January 20\u201321). A Digital PUF-Based IP Protection Architecture for Network Embedded Systems. Proceedings of the Tenth ACM\/IEEE Symposium on Architectures for Networking and Communications Systems, Los Angeles, CA, USA.","DOI":"10.1145\/2658260.2661776"},{"key":"ref_129","doi-asserted-by":"crossref","unstructured":"Guo, Q., Ye, J., Gong, Y., Hu, Y., and Li, X. (2018, January 15\u201318). PUF Based Pay-Per-Device Scheme for IP Protection of CNN Model. Proceedings of the 2018 IEEE 27th Asian Test Symposium (ATS), Hefei, China.","DOI":"10.1109\/ATS.2018.00032"},{"key":"ref_130","doi-asserted-by":"crossref","first-page":"7025","DOI":"10.1109\/TIE.2019.2938462","article-title":"Physical Unclonable Function-Based Key Sharing via Machine Learning for IoT Security","volume":"67","author":"Zhang","year":"2020","journal-title":"IEEE Trans. Ind. Electron."},{"key":"ref_131","doi-asserted-by":"crossref","first-page":"1085","DOI":"10.1109\/TVLSI.2016.2606658","article-title":"DRAM-Based Intrinsic Physically Unclonable Functions for System-Level Security and Authentication","volume":"25","author":"Tehranipoor","year":"2017","journal-title":"IEEE Trans. Very Large Scale Integr. (VLSI) Syst."},{"key":"ref_132","unstructured":"Thampi, S.M., Madria, S., Wang, G., Rawat, D.B., and Alcaraz Calero, J.M. (2018, January 19\u201322). SPIC-SRAM PUF Intergrated Chip Based Software Licensing Model. Proceedings of the Security in Computing and Communications, Bangalore, India."},{"key":"ref_133","doi-asserted-by":"crossref","first-page":"303","DOI":"10.1007\/s42979-022-01194-x","article-title":"Hardware Obfuscation of AES IP Core Using PUFs and PRNG: A Secure Cryptographic Key Generation Solution for Internet-of-Things Applications","volume":"3","author":"Chhabra","year":"2022","journal-title":"SN Comput. Sci."},{"key":"ref_134","doi-asserted-by":"crossref","unstructured":"Enamul Quadir, M.S., and Chandy, J.A. (2019). Key Generation for Hardware Obfuscation Using Strong PUFs. Cryptography, 3.","DOI":"10.3390\/cryptography3030017"},{"key":"ref_135","doi-asserted-by":"crossref","first-page":"1193","DOI":"10.1109\/TVLSI.2015.2437996","article-title":"A Practical Logic Obfuscation Technique for Hardware Security","volume":"24","author":"Zhang","year":"2016","journal-title":"IEEE Trans. Very Large Scale Integr. (VLSI) Syst."},{"key":"ref_136","doi-asserted-by":"crossref","first-page":"719","DOI":"10.1109\/TII.2010.2068303","article-title":"A Flexible Design Flow for Software IP Binding in FPGA","volume":"6","author":"Gora","year":"2010","journal-title":"IEEE Trans. Ind. Inform."},{"key":"ref_137","doi-asserted-by":"crossref","first-page":"700","DOI":"10.1109\/TCSI.2017.2727546","article-title":"A Ring Oscillator-Based Identification Mechanism Immune to Aging and External Working Conditions","volume":"65","author":"Barbareschi","year":"2017","journal-title":"IEEE Trans. Circuits Syst. I Regul. Pap."},{"key":"ref_138","doi-asserted-by":"crossref","first-page":"1057","DOI":"10.1007\/s11280-019-00677-x","article-title":"A PUF-Based Unified Identity Verification Framework for Secure IoT Hardware via Device Authentication","volume":"23","author":"Huang","year":"2020","journal-title":"World Wide Web"},{"key":"ref_139","doi-asserted-by":"crossref","first-page":"1971","DOI":"10.1109\/TII.2021.3096048","article-title":"A Scalable Protocol Level Approach to Prevent Machine Learning Attacks on Physically Unclonable Function Based Authentication Mechanisms for Internet of Medical Things","volume":"18","author":"Gope","year":"2022","journal-title":"IEEE Trans. Ind. Inform."},{"key":"ref_140","first-page":"19","article-title":"Lessons Learned: Analysis of PUF-Based Authentication Protocols for IoT","volume":"4","author":"Lounis","year":"2022","journal-title":"Digit. Threat."},{"key":"ref_141","doi-asserted-by":"crossref","unstructured":"G\u00fcneysu, T., and Handschuh, H. (2015, January 13\u201316). End-To-End Design of a PUF-Based Privacy Preserving Authentication Protocol. Proceedings of the Cryptographic Hardware and Embedded Systems\u2014CHES 2015, Saint-Malo, France.","DOI":"10.1007\/978-3-662-48324-4"},{"key":"ref_142","doi-asserted-by":"crossref","first-page":"26251","DOI":"10.3390\/s151026251","article-title":"PUFKEY: A High-Security and High-Throughput Hardware True Random Number Generator for Sensor Networks","volume":"15","author":"Li","year":"2015","journal-title":"Sensors"},{"key":"ref_143","doi-asserted-by":"crossref","unstructured":"Naccache, D. (2012). Cryptography and Security: From Theory to Applications: Essays Dedicated to Jean-Jacques Quisquater on the Occasion of His 65th Birthday, Springer.","DOI":"10.1007\/978-3-642-28368-0"},{"key":"ref_144","doi-asserted-by":"crossref","first-page":"57","DOI":"10.1016\/j.micpro.2018.02.001","article-title":"FPGA Implementation of SRAM PUFs Based Cryptographically Secure Pseudo-Random Number Generator","volume":"59","author":"Chen","year":"2018","journal-title":"Microprocess. Microsyst."}],"container-title":["Cryptography"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.mdpi.com\/2410-387X\/7\/4\/55\/pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,10,10]],"date-time":"2025-10-10T21:15:47Z","timestamp":1760130947000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.mdpi.com\/2410-387X\/7\/4\/55"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,11,1]]},"references-count":144,"journal-issue":{"issue":"4","published-online":{"date-parts":[[2023,12]]}},"alternative-id":["cryptography7040055"],"URL":"https:\/\/doi.org\/10.3390\/cryptography7040055","relation":{},"ISSN":["2410-387X"],"issn-type":[{"value":"2410-387X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2023,11,1]]}}}