{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,6]],"date-time":"2026-05-06T02:34:44Z","timestamp":1778034884786,"version":"3.51.4"},"reference-count":39,"publisher":"MDPI AG","issue":"7","license":[{"start":{"date-parts":[[2023,6,21]],"date-time":"2023-06-21T00:00:00Z","timestamp":1687305600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"funder":[{"name":"National Natural Science Foundation of China","award":["62201258"],"award-info":[{"award-number":["62201258"]}]},{"name":"National Natural Science Foundation of China","award":["2023D12"],"award-info":[{"award-number":["2023D12"]}]},{"name":"National Mobile Communications Research Laboratory, Southeast University","award":["62201258"],"award-info":[{"award-number":["62201258"]}]},{"name":"National Mobile Communications Research Laboratory, Southeast University","award":["2023D12"],"award-info":[{"award-number":["2023D12"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Entropy"],"abstract":"<jats:p>As the technology scales down, two-dimensional (2D) NAND flash memory has reached its bottleneck. Three-dimensional (3D) NAND flash memory was proposed to further increase the storage capacity by vertically stacking multiple layers. However, the new architecture of 3D flash memory leads to new sources of errors, which severely affects the reliability of the system. In this paper, for the first time, we derive the channel probability density function of 3D NAND flash memory by taking major sources of errors. Based on the derived channel probability density function, the mutual information (MI) for 3D flash memory with multiple layers is derived and used as a metric to design the quantization. Specifically, we propose a dynamic programming algorithm to jointly optimize read-voltage thresholds for all layers by maximizing the MI (MMI). To further reduce the complexity, we develop an MI derivative (MID)-based method to obtain read-voltage thresholds for hard-decision decoding (HDD) of error correction codes (ECCs). Simulation results show that the performance with jointly optimized read-voltage thresholds can closely approach that with read-voltage thresholds optimized for each layer, with much less read latency. Moreover, the MID-based MMI quantizer almost achieves the optimal performance for HDD of ECCs.<\/jats:p>","DOI":"10.3390\/e25070965","type":"journal-article","created":{"date-parts":[[2023,6,22]],"date-time":"2023-06-22T02:29:18Z","timestamp":1687400958000},"page":"965","update-policy":"https:\/\/doi.org\/10.3390\/mdpi_crossmark_policy","source":"Crossref","is-referenced-by-count":9,"title":["Channel Modeling and Quantization Design for 3D NAND Flash Memory"],"prefix":"10.3390","volume":"25","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-6239-8753","authenticated-orcid":false,"given":"Cheng","family":"Wang","sequence":"first","affiliation":[{"name":"School of Electronic and Optical Engineering, Nanjing University of Science and Technology, Nanjing 210094, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9769-0604","authenticated-orcid":false,"given":"Zhen","family":"Mei","sequence":"additional","affiliation":[{"name":"School of Electronic and Optical Engineering, Nanjing University of Science and Technology, Nanjing 210094, China"},{"name":"National Mobile Communications Research Laboratory, Southeast University, Nanjing 210096, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jun","family":"Li","sequence":"additional","affiliation":[{"name":"School of Electronic and Optical Engineering, Nanjing University of Science and Technology, Nanjing 210094, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Feng","family":"Shu","sequence":"additional","affiliation":[{"name":"School of Information and Communication Engineering, Hainan University, Haikou 570228, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Xuan","family":"He","sequence":"additional","affiliation":[{"name":"School of Information Science and Technology, Southwest Jiaotong University, Chengdu 611756, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6452-5322","authenticated-orcid":false,"given":"Lingjun","family":"Kong","sequence":"additional","affiliation":[{"name":"Jinling Institute of Technology, Nanjing 211169, China"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"1968","published-online":{"date-parts":[[2023,6,21]]},"reference":[{"key":"ref_1","doi-asserted-by":"crossref","unstructured":"Kim, K. (2008, January 21\u201323). Future memory technology: Challenges and opportunities. Proceedings of the International Symposium on VLSI Technology, Systems and Applications, Hsinchu, Taiwan.","DOI":"10.1109\/VTSA.2008.4530774"},{"key":"ref_2","doi-asserted-by":"crossref","first-page":"429","DOI":"10.1109\/TCSI.2010.2071990","article-title":"On the use of soft-decision error-correction codes in NAND flash memory","volume":"58","author":"Dong","year":"2011","journal-title":"IEEE Trans. Circuits Syst. I Reg. Pap."},{"key":"ref_3","unstructured":"Li, Q., Jiang, Q., and Haratsch, E.F. (July, January 29). Noise modeling and capacity analysis for NAND flash memories. Proceedings of the IEEE International Symposium on Information Theory, Honolulu, HI, USA."},{"key":"ref_4","doi-asserted-by":"crossref","unstructured":"Luo, Y., Ghose, S., Cai, Y., Haratsch, E.F., and Mutlu, O. (2018, January 24\u201328). HeatWatch: Improving 3D NAND Flash Memory Device Reliability by Exploiting Self-Recovery and Temperature Awareness. In Proceeding of the IEEE International Symposium on High Performance Computer Architecture, Vienna, Austria.","DOI":"10.1109\/HPCA.2018.00050"},{"key":"ref_5","doi-asserted-by":"crossref","first-page":"4611","DOI":"10.1109\/TCAD.2020.2982623","article-title":"Temperature-aware persistent data management for LSM-tree on 3-D NAND flash memory","volume":"39","author":"Wang","year":"2020","journal-title":"IEEE Trans. Comput. Aided Des. Integr. Circuits Syst."},{"key":"ref_6","first-page":"1302","article-title":"PVSensing: A Process-Variation-Aware Space Allocation Strategy for 3D NAND Flash Memory","volume":"42","author":"Wang","year":"2021","journal-title":"IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."},{"key":"ref_7","doi-asserted-by":"crossref","first-page":"1","DOI":"10.1145\/3126520","article-title":"P-Alloc: Process-variation tolerant reliability management for 3D charge-trapping flash memory","volume":"16","author":"Wang","year":"2017","journal-title":"ACM Trans. Embed. Comput. Syst."},{"key":"ref_8","doi-asserted-by":"crossref","unstructured":"Micheloni, R. (2016). 3D Flash Memories, Springer.","DOI":"10.1007\/978-94-017-7512-0"},{"key":"ref_9","doi-asserted-by":"crossref","first-page":"1","DOI":"10.1145\/3224432","article-title":"Improving 3D NAND flash memory lifetime by tolerating early retention loss and process variation","volume":"2","author":"Luo","year":"2018","journal-title":"Proc. ACM Meas. Anal. Comput. Syst."},{"key":"ref_10","doi-asserted-by":"crossref","first-page":"225","DOI":"10.1016\/j.measurement.2015.04.003","article-title":"Modelling and characterization of NAND flash memory channels","volume":"70","author":"Xu","year":"2015","journal-title":"Measurement"},{"key":"ref_11","first-page":"1","article-title":"Modeling of program Vth distribution for 3-D TLC NAND flash memory","volume":"62","author":"Wang","year":"2019","journal-title":"Sci. China Inf. Sci."},{"key":"ref_12","doi-asserted-by":"crossref","unstructured":"Shim, Y., Kim, M., Chun, M., Park, J., Kim, Y., and Kim, J. (2019, January 12\u201316). Exploiting process similarity of 3D flash memory for high performance SSDs. Proceedings of the Annual IEEE\/ACM International Symposium on Microarchitecture, New York, NY, USA.","DOI":"10.1145\/3352460.3358311"},{"key":"ref_13","unstructured":"Papandreou, N., Pozidis, H., Parnell, T., Ioannou, N., Pletka, R., Tomic, S., Breen, P., Tressler, G., Fry, A., and Fisher, T. (April, January 31). Characterization and analysis of bit errors in 3D TLC NAND flash memory. Proceedings of the IEEE International Reliability Physics Symposium, Monterey, CA, USA."},{"key":"ref_14","unstructured":"Choi, B., Jang, S.H., Yoon, J., Lee, J., Jeon, M., Lee, Y., Han, J., Lee, J., Kim, D.M., and Kim, D.H. (2016, January 14\u201316). Comprehensive evaluation of early retention (fast charge loss within a few seconds) characteristics in tube-type 3-D NAND flash memory. Proceedings of the IEEE Symposium on VLSI Technology, Honolulu, HI, USA."},{"key":"ref_15","doi-asserted-by":"crossref","first-page":"21","DOI":"10.1109\/TIT.1962.1057683","article-title":"Low-density parity-check codes","volume":"8","author":"Gallager","year":"1962","journal-title":"IRE Trans. Inf. Theory"},{"key":"ref_16","doi-asserted-by":"crossref","unstructured":"Du, Y., Zhou, Y., Zhang, M., Liu, W., and Xiong, S. (2019, January 2\u20136). Adapting layer RBERs variations of 3D flash memories via multi-granularity progressive LDPC reading. Proceedings of the Annual Design Automation Conference, Las Vegas, NV, USA.","DOI":"10.1145\/3316781.3317759"},{"key":"ref_17","doi-asserted-by":"crossref","unstructured":"Zhang, M., Wu, F., Yu, Q., Liu, W., Cui, L., Zhao, Y., and Xie, C. (2020, January 9\u201313). BeLDPC: Bit errors aware adaptive rate LDPC codes for 3D TLC NAND flash memory. Proceedings of the Design, Automation and Test in Europe Conference and Exhibition, Grenoble, France.","DOI":"10.23919\/DATE48585.2020.9116324"},{"key":"ref_18","doi-asserted-by":"crossref","first-page":"880","DOI":"10.1109\/JSAC.2014.140508","article-title":"Enhanced precision through multiple reads for LDPC decoding in flash memories","volume":"32","author":"Wang","year":"2014","journal-title":"IEEE J. Sel. Areas. Commun."},{"key":"ref_19","doi-asserted-by":"crossref","first-page":"44696","DOI":"10.1109\/ACCESS.2019.2909567","article-title":"RBER-aware lifetime prediction scheme for 3D-TLC NAND flash memory","volume":"7","author":"Ma","year":"2019","journal-title":"IEEE Access"},{"key":"ref_20","doi-asserted-by":"crossref","first-page":"2863","DOI":"10.1109\/TCAD.2021.3117508","article-title":"Differential Evolution Algorithm with Asymmetric Coding for Solving the Reliability Problem of 3D-TLC CT Flash-Memory Storage Systems","volume":"41","author":"Yu","year":"2021","journal-title":"IEEE Trans. Comput. Aided Des. Integr Circuits Syst."},{"key":"ref_21","doi-asserted-by":"crossref","first-page":"1613","DOI":"10.1109\/TCOMM.2016.2533498","article-title":"Read and write voltage signal optimization for multi-level-cell (MLC) NAND flash memory","volume":"64","author":"Aslam","year":"2016","journal-title":"IEEE Trans. Comm."},{"key":"ref_22","doi-asserted-by":"crossref","first-page":"1705","DOI":"10.1109\/TCAD.2022.3191548","article-title":"LIAD: A Method for Extending the Effective Time of 3D TLC NAND Flash Hard Decision","volume":"42","author":"Yu","year":"2022","journal-title":"IEEE Trans. Comput. Aided Des. Integr Circuits Syst."},{"key":"ref_23","doi-asserted-by":"crossref","first-page":"3069","DOI":"10.1109\/TCOMM.2015.2453413","article-title":"Adaptive read thresholds for NAND flash","volume":"63","author":"Peleato","year":"2015","journal-title":"IEEE Trans. Commun."},{"key":"ref_24","doi-asserted-by":"crossref","first-page":"120","DOI":"10.1049\/cmu2.12311","article-title":"DNN-aided read-voltage threshold optimization for MLC flash memory with finite block length","volume":"16","author":"Wang","year":"2022","journal-title":"IET Commun."},{"key":"ref_25","doi-asserted-by":"crossref","unstructured":"Mei, Z., Cai, K., and Shi, L. (2018, January 25\u201329). Information theoretic bounds based channel quantization design for emerging memories. Proceedings of the IEEE Information Theory Workshop, Guangzhou, China.","DOI":"10.1109\/ITW.2018.8613421"},{"key":"ref_26","doi-asserted-by":"crossref","unstructured":"Li, Q., Ye, M., Cui, Y., Shi, L., Li, X., Kuo, T.W., and Xue, C.J. (2020, January 9\u201313). Shaving retries with sentinels for fast read over high-density 3D flash. Proceedings of the Annual IEEE\/ACM International Symposium on Microarchitecture, Athens, Greece.","DOI":"10.1109\/MICRO50266.2020.00048"},{"key":"ref_27","doi-asserted-by":"crossref","first-page":"475","DOI":"10.1109\/TC.2019.2959318","article-title":"Exploiting asymmetric errors for LDPC decoding optimization on 3D NAND flash memory","volume":"69","author":"Li","year":"2020","journal-title":"IEEE Trans. Comput."},{"key":"ref_28","doi-asserted-by":"crossref","first-page":"5490","DOI":"10.1109\/TED.2020.3030867","article-title":"Exploiting error characteristic to optimize read voltage for 3-D NAND flash memory","volume":"67","author":"Zhang","year":"2020","journal-title":"IEEE Trans. Electron Devices"},{"key":"ref_29","doi-asserted-by":"crossref","first-page":"1183","DOI":"10.1109\/TCSI.2020.3047484","article-title":"Characterization of Inter-Cell Interference in 3D NAND Flash Memory","volume":"68","author":"Park","year":"2021","journal-title":"IEEE Trans. Circuits Syst. I Reg. Pap."},{"key":"ref_30","doi-asserted-by":"crossref","unstructured":"Liu, W., Wu, F., Zhou, J., Zhang, M., Yang, C., Lu, Z., Wang, Y., and Xie, C. (2021, January 1\u20135). Modeling of threshold voltage distribution in 3d nand flash memory. Proceedings of the Design, Automation and Test in Europe Conference and Exhibition, Grenoble, France.","DOI":"10.23919\/DATE51398.2021.9473974"},{"key":"ref_31","doi-asserted-by":"crossref","first-page":"489","DOI":"10.1109\/JPROC.2003.811702","article-title":"Introduction to flash memory","volume":"91","author":"Bez","year":"2003","journal-title":"Proc. IEEE"},{"key":"ref_32","doi-asserted-by":"crossref","first-page":"1666","DOI":"10.1109\/JPROC.2017.2713127","article-title":"Error characterization, mitigation, and recovery in flash-memory-based solid-state drives","volume":"105","author":"Cai","year":"2017","journal-title":"Proc. IEEE"},{"key":"ref_33","doi-asserted-by":"crossref","first-page":"1149","DOI":"10.1109\/4.475701","article-title":"A 3.3 V 32 Mb NAND flash memory with incremental step pulse programming scheme","volume":"30","author":"Suh","year":"1995","journal-title":"IEEE J. Solid-State Circuits"},{"key":"ref_34","doi-asserted-by":"crossref","first-page":"768","DOI":"10.1109\/TCAD.2022.3191256","article-title":"Improving 3D NAND SSD read performance by parallelizing read-retry","volume":"42","author":"Cui","year":"2022","journal-title":"IEEE Trans. Comput. Aided Des. Integr. Circuits Syst."},{"key":"ref_35","doi-asserted-by":"crossref","first-page":"2718","DOI":"10.1109\/TCSI.2010.2046966","article-title":"Using data postcompensation and predistortion to tolerate cell-to-cell interference in MLC NAND flash memory","volume":"57","author":"Dong","year":"2010","journal-title":"IEEE Trans. Circuits Syst. I Reg. Pap."},{"key":"ref_36","doi-asserted-by":"crossref","first-page":"353","DOI":"10.1109\/TCSI.2017.2714902","article-title":"Decision-directed retention-failure recovery with channel update for MLC NAND flash memory","volume":"65","author":"Aslam","year":"2018","journal-title":"IEEE Trans. Circuits Syst. I Reg. Pap."},{"key":"ref_37","doi-asserted-by":"crossref","first-page":"2412","DOI":"10.1109\/TCSI.2013.2244361","article-title":"Enabling NAND flash memory use soft-decision error correction codes at minimal read latency overhead","volume":"60","author":"Dong","year":"2013","journal-title":"IEEE Trans. Circuits Syst. I Reg. Pap."},{"key":"ref_38","unstructured":"Ash, R.B. (2012). Information Theory, Courier Corporation."},{"key":"ref_39","doi-asserted-by":"crossref","first-page":"3638","DOI":"10.1109\/TCOMM.2021.3062838","article-title":"Dynamic programming for sequential deterministic quantization of discrete memoryless channels","volume":"69","author":"He","year":"2021","journal-title":"IEEE Trans. Commun."}],"container-title":["Entropy"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.mdpi.com\/1099-4300\/25\/7\/965\/pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,10,10]],"date-time":"2025-10-10T19:58:17Z","timestamp":1760126297000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.mdpi.com\/1099-4300\/25\/7\/965"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,6,21]]},"references-count":39,"journal-issue":{"issue":"7","published-online":{"date-parts":[[2023,7]]}},"alternative-id":["e25070965"],"URL":"https:\/\/doi.org\/10.3390\/e25070965","relation":{},"ISSN":["1099-4300"],"issn-type":[{"value":"1099-4300","type":"electronic"}],"subject":[],"published":{"date-parts":[[2023,6,21]]}}}