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The main feature of the proposed scheme is that it exploits the asymmetric properties of an MLC flash channel and stores the extra parity-check bits in the lower page, which are activated only after the decoding failure of the upper page. To further improve the performance of the error correction, a perturbation process based on the genetic algorithm (GA) is incorporated into the decoding process of the proposed coding scheme, which can convert uncorrectable read sequences into error-correctable regions of the corresponding decoding space by introducing GA-trained noises. The perturbation decoding process is particularly efficient at low program-and-erase (P\/E) cycle regions. The simulation results suggest that the proposed bilayer LDPC coding scheme can extend the lifetime of MLC NAND flash memory up to 10,000 P\/E cycles. The proposed scheme can achieve a better balance between performance and complexity than traditional single LDPC coding schemes. All of these findings indicate that the proposed coding scheme is suitable for practical purposes in MLC NAND flash memory.<\/jats:p>","DOI":"10.3390\/e26010054","type":"journal-article","created":{"date-parts":[[2024,1,8]],"date-time":"2024-01-08T06:12:58Z","timestamp":1704694378000},"page":"54","update-policy":"https:\/\/doi.org\/10.3390\/mdpi_crossmark_policy","source":"Crossref","is-referenced-by-count":3,"title":["Bilayer LDPC Codes Combined with Perturbed Decoding for MLC NAND Flash Memory"],"prefix":"10.3390","volume":"26","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-6452-5322","authenticated-orcid":false,"given":"Lingjun","family":"Kong","sequence":"first","affiliation":[{"name":"Faculty of Network and Telecommunication Engineering, Jinling Institute of Technology, Nanjing 211169, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6567-8603","authenticated-orcid":false,"given":"Haiyang","family":"Liu","sequence":"additional","affiliation":[{"name":"Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8834-9535","authenticated-orcid":false,"given":"Wentao","family":"Hou","sequence":"additional","affiliation":[{"name":"College of Telecommunications and Information Engineering, Nanjing University of Posts and Telecommunications, Nanjing 210003, China"}]},{"given":"Chao","family":"Meng","sequence":"additional","affiliation":[{"name":"Faculty of Network and Telecommunication Engineering, Jinling Institute of Technology, Nanjing 211169, China"}]}],"member":"1968","published-online":{"date-parts":[[2024,1,8]]},"reference":[{"key":"ref_1","doi-asserted-by":"crossref","first-page":"1666","DOI":"10.1109\/JPROC.2017.2713127","article-title":"Error characterization, mitigation, and recovery in flash-memory-based solid-state drives","volume":"105","author":"Cai","year":"2017","journal-title":"Proc. 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