{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,24]],"date-time":"2026-02-24T17:17:54Z","timestamp":1771953474569,"version":"3.50.1"},"reference-count":32,"publisher":"MDPI AG","issue":"11","license":[{"start":{"date-parts":[[2024,11,1]],"date-time":"2024-11-01T00:00:00Z","timestamp":1730419200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Information"],"abstract":"<jats:p>We propose two decoding algorithms for quasi-cyclic LDPC codes (QC-LDPC) and implement the more efficient one in this paper. These algorithms depend on the split row for the layered decoding method applied to the Min-Sum (MS) algorithm. We designate the first algorithm \u201cSplit-Row Layered Min-Sum\u201d (SRLMS), and the second algorithm \u201cSplit-Row Threshold Layered Min-Sum\u201d (SRTLMS). A threshold message passes from one partition to another in SRTLMS, minimizing the gap from the MS and achieving a binary error rate of 3 \u00d7 10\u22125 with Imax = 4 as the maximum number of iterations, resulting in a decrease of 0.25 dB. The simulation\u2019s findings indicate that the SRTLMS is the most efficient variant decoding algorithm for LDPC codes, thanks to its compromise between performance and complexity. This paper presents the two invented algorithms and a comprehensive study of the co-design and implementation of the SRTLMS algorithm. We executed the implementation on a Xilinx Kintex-7 XC7K160 FPGA, achieving a maximum operating frequency of 101 MHz and a throughput of 606 Mbps.<\/jats:p>","DOI":"10.3390\/info15110684","type":"journal-article","created":{"date-parts":[[2024,11,1]],"date-time":"2024-11-01T11:53:43Z","timestamp":1730462023000},"page":"684","update-policy":"https:\/\/doi.org\/10.3390\/mdpi_crossmark_policy","source":"Crossref","is-referenced-by-count":1,"title":["Implementation of a Reduced Decoding Algorithm Complexity for Quasi-Cyclic Split-Row Threshold Low-Density Parity-Check Decoders"],"prefix":"10.3390","volume":"15","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-6758-8054","authenticated-orcid":false,"given":"Bilal","family":"Mejmaa","sequence":"first","affiliation":[{"name":"Department of Physics, University Sidi Mohamed Ben Abdellah (USMBA), Fez 30000, Morocco"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2457-0449","authenticated-orcid":false,"given":"Chakir","family":"Aqil","sequence":"additional","affiliation":[{"name":"Department of Physics, University Sidi Mohamed Ben Abdellah (USMBA), Fez 30000, Morocco"}]},{"given":"Ismail","family":"Akharraz","sequence":"additional","affiliation":[{"name":"Department of Informatics and Mathematical Engineering, University Ibn Zohr (UIZ), Agadir 80000, Morocco"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5310-1388","authenticated-orcid":false,"given":"Abdelaziz","family":"Ahaitouf","sequence":"additional","affiliation":[{"name":"Department of Physics, University Sidi Mohamed Ben Abdellah (USMBA), Fez 30000, Morocco"}]}],"member":"1968","published-online":{"date-parts":[[2024,11,1]]},"reference":[{"key":"ref_1","doi-asserted-by":"crossref","first-page":"1962","DOI":"10.1109\/TIT.1962.1057683","article-title":"Low-density parity-check codes","volume":"8","author":"Gallager","year":"1962","journal-title":"IRE Trans. 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