{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,15]],"date-time":"2026-04-15T17:57:36Z","timestamp":1776275856934,"version":"3.50.1"},"reference-count":22,"publisher":"MDPI AG","issue":"21","license":[{"start":{"date-parts":[[2021,10,31]],"date-time":"2021-10-31T00:00:00Z","timestamp":1635638400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Remote Sensing"],"abstract":"<jats:p>The increment in the use of high-resolution imaging sensors on-board satellites motivates the use of on-board image compression, mainly due to restrictions in terms of both hardware (computational and storage resources) and downlink bandwidth with the ground. This work presents a compression solution based on the CCSDS 123.0-B-2 near-lossless compression standard for multi- and hyperspectral images, which deals with the high amount of data acquired by these next-generation sensors. The proposed approach has been developed following an HLS design methodology, accelerating design time and obtaining good system performance. The compressor is comprised by two main stages, a predictor and a hybrid encoder, designed in Band-Interleaved by Line (BIL) order and optimized to achieve a trade-off between throughput and logic resources utilization. This solution has been mapped on a Xilinx Kintex UltraScale XCKU040 FPGA and targeting AVIRIS images, reaching a throughput of 12.5 MSamples\/s and consuming only the 7% of LUTs and around the 14% of dedicated memory blocks available in the device. To the best of our knowledge, this is the first fully-compliant hardware implementation of the CCSDS 123.0-B-2 near-lossless compression standard available in the state of the art.<\/jats:p>","DOI":"10.3390\/rs13214388","type":"journal-article","created":{"date-parts":[[2021,11,1]],"date-time":"2021-11-01T22:24:22Z","timestamp":1635805462000},"page":"4388","update-policy":"https:\/\/doi.org\/10.3390\/mdpi_crossmark_policy","source":"Crossref","is-referenced-by-count":14,"title":["Hardware Implementation of the CCSDS 123.0-B-2 Near-Lossless Compression Standard Following an HLS Design Methodology"],"prefix":"10.3390","volume":"13","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-6186-9971","authenticated-orcid":false,"given":"Yubal","family":"Barrios","sequence":"first","affiliation":[{"name":"Institute for Applied Microelectronics (IUMA), University of Las Palmas de Gran Canaria (ULPGC), 35017 Las Palmas de Gran Canaria, Spain"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-2142-7885","authenticated-orcid":false,"given":"Antonio","family":"S\u00e1nchez","sequence":"additional","affiliation":[{"name":"Institute for Applied Microelectronics (IUMA), University of Las Palmas de Gran Canaria (ULPGC), 35017 Las Palmas de Gran Canaria, Spain"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4303-3051","authenticated-orcid":false,"given":"Ra\u00fal","family":"Guerra","sequence":"additional","affiliation":[{"name":"Institute for Applied Microelectronics (IUMA), University of Las Palmas de Gran Canaria (ULPGC), 35017 Las Palmas de Gran Canaria, Spain"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4843-0507","authenticated-orcid":false,"given":"Roberto","family":"Sarmiento","sequence":"additional","affiliation":[{"name":"Institute for Applied Microelectronics (IUMA), University of Las Palmas de Gran Canaria (ULPGC), 35017 Las Palmas de Gran Canaria, Spain"}]}],"member":"1968","published-online":{"date-parts":[[2021,10,31]]},"reference":[{"key":"ref_1","doi-asserted-by":"crossref","unstructured":"Qian, S.E. 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