{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,20]],"date-time":"2026-04-20T17:27:24Z","timestamp":1776706044814,"version":"3.51.2"},"reference-count":25,"publisher":"MDPI AG","issue":"5","license":[{"start":{"date-parts":[[2012,5,10]],"date-time":"2012-05-10T00:00:00Z","timestamp":1336608000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/3.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Sensors"],"abstract":"<jats:p>This paper presents a novel hardware architecture for principal component analysis. The architecture is based on the Generalized Hebbian Algorithm (GHA) because of its simplicity and effectiveness. The architecture is separated into three portions: the weight vector updating unit, the principal computation unit and the memory unit. In the weight vector updating unit, the computation of different synaptic weight vectors shares the same circuit for reducing the area costs. To show the effectiveness of the circuit, a texture classification system based on the proposed architecture is physically implemented by Field Programmable Gate Array (FPGA). It is embedded in a System-On-Programmable-Chip (SOPC) platform for performance measurement. Experimental results show that the proposed architecture is an efficient design for attaining both high speed performance andlow area costs.<\/jats:p>","DOI":"10.3390\/s120506244","type":"journal-article","created":{"date-parts":[[2012,5,10]],"date-time":"2012-05-10T11:11:15Z","timestamp":1336648275000},"page":"6244-6268","update-policy":"https:\/\/doi.org\/10.3390\/mdpi_crossmark_policy","source":"Crossref","is-referenced-by-count":4,"title":["FPGA Implementation of Generalized Hebbian Algorithm for Texture Classification"],"prefix":"10.3390","volume":"12","author":[{"given":"Shiow-Jyu","family":"Lin","sequence":"first","affiliation":[{"name":"Department of Electronic Engineering, National Ilan University, Yilan 260, Taiwan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4003-1568","authenticated-orcid":false,"given":"Wen-Jyi","family":"Hwang","sequence":"additional","affiliation":[{"name":"Department of Computer Science and Information Engineering, National Taiwan Normal University, Taipei 116, Taiwan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Wei-Hao","family":"Lee","sequence":"additional","affiliation":[{"name":"Department of Computer Science and Information Engineering, National Taiwan Normal University, Taipei 116, Taiwan"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"1968","published-online":{"date-parts":[[2012,5,10]]},"reference":[{"key":"ref_1","unstructured":"Jolliffe, I.T. (2002). Principal Component Analysis, Springer. [2nd ed.]."},{"key":"ref_2","doi-asserted-by":"crossref","first-page":"996","DOI":"10.1109\/TPAMI.2006.118","article-title":"Face recognition using (incremental) IPCA-ICA algorithm","volume":"28","author":"Dagher","year":"2006","journal-title":"IEEE Trans. Pattern Anal. Mach. Intell."},{"key":"ref_3","doi-asserted-by":"crossref","first-page":"1351","DOI":"10.1109\/TPAMI.2005.181","article-title":"Iterative kernel principal component analysis for image modeling","volume":"27","author":"Kim","year":"2005","journal-title":"IEEE Trans. Pattern Anal. Mach. Intell."},{"key":"ref_4","first-page":"626","article-title":"EM algorithms for PCA and SPCA","volume":"10","author":"Roweis","year":"1998","journal-title":"Adv. Neural Inf. Process. Syst."},{"key":"ref_5","doi-asserted-by":"crossref","unstructured":"Sajid, I., Ahmed, M.M., and Taj, I. (2008, January 13\u201315). Design and Implementation of a Face Recognition System Using Fast PCA. Hobart, Australia.","DOI":"10.1109\/CSA.2008.33"},{"key":"ref_6","doi-asserted-by":"crossref","first-page":"1151","DOI":"10.1016\/j.patrec.2007.01.012","article-title":"Fast principal component analysis using fixed-point algorithm","volume":"28","author":"Sharma","year":"2007","journal-title":"Pattern Recogn. Lett."},{"key":"ref_7","unstructured":"Boonkumklao, W., Miyanaga, Y., and Dejhan, K. (2001, January 14\u201316). Flexible PCA Architecture Realized on FPGA. ChiangMai, Thailand."},{"key":"ref_8","unstructured":"Chen, T.-C., Liu, W., and Chen, L.-G. (2008, January 20\u201324). VLSI Architecture of Leading Eigenvector Generation for On-Chip Principal Component Analysis Spike Sorting System. Vancouver, BC, Canada."},{"key":"ref_9","first-page":"1","article-title":"An FPGA-based face recognition using combined 5\/3 DWT with PCA methods","volume":"6","author":"Chen","year":"2009","journal-title":"J. Commun. Comput."},{"key":"ref_10","unstructured":"Ngo, H.T., Rajkiran, G., and Asari, V.K. (2005, January 11\u201312). A Flexible and Efficient Hardware Architecture for Real-Time Face Recognition Based on Eigenface. Tampa, FL, USA."},{"key":"ref_11","doi-asserted-by":"crossref","first-page":"216","DOI":"10.1016\/j.micpro.2005.07.003","article-title":"Multi-lane architecture for eigenface based real-time face recognition","volume":"30","author":"Gottumukkal","year":"2006","journal-title":"Microprocess. Microsyst."},{"key":"ref_12","doi-asserted-by":"crossref","first-page":"342","DOI":"10.1016\/j.patrec.2006.04.006","article-title":"System-on-programmable-chip implementation for on-line face recognition","volume":"28","author":"Kamakoti","year":"2007","journal-title":"Pattern Recogn. Lett."},{"key":"ref_13","unstructured":"Haykin, S. (2009). Neural Networks and Learning Machines, Pearson. [3rd ed.]."},{"key":"ref_14","doi-asserted-by":"crossref","first-page":"459","DOI":"10.1016\/0893-6080(89)90044-0","article-title":"Optimal unsupervised learning in a single-layer linear feedforward neural network","volume":"12","author":"Sanger","year":"1989","journal-title":"Neural Netw."},{"key":"ref_15","doi-asserted-by":"crossref","first-page":"26","DOI":"10.1109\/MSP.2009.934110","article-title":"A survey of multicore processors","volume":"26","author":"Blake","year":"2009","journal-title":"IEEE Signal Process. Mag."},{"key":"ref_16","unstructured":"Carvajal, G., Valenzuela, W., and Figueroa, M. (2008). Advances in Neural Information Processing Systems, MIT Press."},{"key":"ref_17","first-page":"428","article-title":"Image recognition in analog VLSI with on-chip learning","volume":"5768","author":"Carvajal","year":"2009","journal-title":"Artif. Neural Netw."},{"key":"ref_18","doi-asserted-by":"crossref","first-page":"3248","DOI":"10.1016\/j.neucom.2011.05.010","article-title":"Efficient hardware architecture based on generalized Hebbian algorithm for texture classification","volume":"74","author":"Lin","year":"2011","journal-title":"Neurocomputing"},{"key":"ref_19","doi-asserted-by":"crossref","first-page":"1071","DOI":"10.1109\/TCSVT.2011.2133210","article-title":"A self-configurable systolic architecture for face recognition system based on principal component neural network","volume":"21","author":"Sudha","year":"2011","journal-title":"IEEE Trans. Circuits Syst. Video Technol."},{"key":"ref_20","doi-asserted-by":"crossref","unstructured":"Fowers, J., Brown, G., Cooke, P., and Stitt, G. (2012, January 22\u201324). A Performance and Energy Comparison of FPGAs, GPUs, and Multicores for Sliding-Window Applications. Monterey, CA, USA.","DOI":"10.1145\/2145694.2145704"},{"key":"ref_21","doi-asserted-by":"crossref","unstructured":"Pauwels, K., Tomasi, M., Diaz Alonso, J., Ros, E., and van Hulle, M. (2012). A comparison of FPGA and GPU for real-time phase-based optical flow, stereo, and local image features. IEEE Trans. Comput., in press.","DOI":"10.1109\/TC.2011.120"},{"key":"ref_22","unstructured":"Altera Corporation Available online: http:\/\/www.altera.com\/literature\/lit-nio2.jsp (accessed on 3 May 2012)."},{"key":"ref_23","unstructured":"Altera Corporation Available online: http:\/\/www.altera.com\/literature\/lit-sop.jsp (accessed on 3 May 2012)."},{"key":"ref_24","doi-asserted-by":"crossref","unstructured":"Kansal, A., Zhao, F., Liu, J., Kothari, N., and Bhattacharya, A. (2010, January 10\u201311). Virtual Machine Power Metering and Provisioning. Indianapolis, IN, USA.","DOI":"10.1145\/1807128.1807136"},{"key":"ref_25","unstructured":"Altera Corporation Available online: http:\/\/www.altera.com\/literature\/lit-qts.jsp (accessed on 3 May 2012)."}],"container-title":["Sensors"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.mdpi.com\/1424-8220\/12\/5\/6244\/pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,10,11]],"date-time":"2025-10-11T21:50:13Z","timestamp":1760219413000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.mdpi.com\/1424-8220\/12\/5\/6244"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,5,10]]},"references-count":25,"journal-issue":{"issue":"5","published-online":{"date-parts":[[2012,5]]}},"alternative-id":["s120506244"],"URL":"https:\/\/doi.org\/10.3390\/s120506244","relation":{},"ISSN":["1424-8220"],"issn-type":[{"value":"1424-8220","type":"electronic"}],"subject":[],"published":{"date-parts":[[2012,5,10]]}}}