{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,27]],"date-time":"2026-05-27T18:16:02Z","timestamp":1779905762032,"version":"3.53.1"},"reference-count":17,"publisher":"MDPI AG","issue":"12","license":[{"start":{"date-parts":[[2013,12,13]],"date-time":"2013-12-13T00:00:00Z","timestamp":1386892800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/3.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Sensors"],"abstract":"<jats:p>This paper presents an ultra-low power CMOS voltage reference circuit which is robust under biomedical extreme conditions, such as high temperature and high total ionized dose (TID) radiation. To achieve such performances, the voltage reference is designed in a suitable 130 nm Silicon-on-Insulator (SOI) industrial technology and is optimized to work in the subthreshold regime of the transistors. The design simulations have been performed over the temperature range of -40\u2013200 \u00b0C and for different process corners. Robustness to radiation was simulated using custom model parameters including TID effects, such as mobilities and threshold voltages degradation. The proposed circuit has been tested up to high total radiation dose, i.e., 1 Mrad (Si) performed at three different temperatures (room temperature, 100 \u00b0C and 200 \u00b0C). The maximum drift of the reference voltage VREF depends on the considered temperature and on radiation dose; however, it remains lower than 10% of the mean value of 1.5 V. The typical power dissipation at 2.5 V supply voltage is about 20 \u03bcW at room temperature and only 75 \u03bc W at a high temperature of 200 \u00b0C. To understand the effects caused by the combination of high total ionizing dose and temperature on such voltage reference, the threshold voltages of the used SOI MOSFETs were extracted under different conditions. The evolution of VREF and power consumption with temperature and radiation dose can then be explained in terms of the different balance between fixed oxide charge and interface states build-up. The total occupied area including pad-ring is less than 0.09 mm2.<\/jats:p>","DOI":"10.3390\/s131217265","type":"journal-article","created":{"date-parts":[[2013,12,16]],"date-time":"2013-12-16T06:18:40Z","timestamp":1387174720000},"page":"17265-17280","update-policy":"https:\/\/doi.org\/10.3390\/mdpi_crossmark_policy","source":"Crossref","is-referenced-by-count":11,"title":["Ultra-Low Power High Temperature and Radiation Hard Complementary Metal-Oxide-Semiconductor (CMOS) Silicon-on-Insulator (SOI) Voltage Reference"],"prefix":"10.3390","volume":"13","author":[{"given":"El","family":"Boufouss","sequence":"first","affiliation":[{"name":"ICTEAM Institute\u2014Electrical Engineering, Universit\u00e9 catholique de Louvain, Maxwell Building, Place du Levant 3, B-1348 Louvain-la-Neuve, Belgium"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4683-3916","authenticated-orcid":false,"given":"Laurent","family":"Francis","sequence":"additional","affiliation":[{"name":"ICTEAM Institute\u2014Electrical Engineering, Universit\u00e9 catholique de Louvain, Maxwell Building, Place du Levant 3, B-1348 Louvain-la-Neuve, Belgium"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Valeriya","family":"Kilchytska","sequence":"additional","affiliation":[{"name":"ICTEAM Institute\u2014Electrical Engineering, Universit\u00e9 catholique de Louvain, Maxwell Building, Place du Levant 3, B-1348 Louvain-la-Neuve, Belgium"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Pierre","family":"G\u00e9rard","sequence":"additional","affiliation":[{"name":"ICTEAM Institute\u2014Electrical Engineering, Universit\u00e9 catholique de Louvain, Maxwell Building, Place du Levant 3, B-1348 Louvain-la-Neuve, Belgium"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Pascal","family":"Simon","sequence":"additional","affiliation":[{"name":"ICTEAM Institute\u2014Electrical Engineering, Universit\u00e9 catholique de Louvain, Maxwell Building, Place du Levant 3, B-1348 Louvain-la-Neuve, Belgium"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Denis","family":"Flandre","sequence":"additional","affiliation":[{"name":"ICTEAM Institute\u2014Electrical Engineering, Universit\u00e9 catholique de Louvain, Maxwell Building, Place du Levant 3, B-1348 Louvain-la-Neuve, Belgium"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"1968","published-online":{"date-parts":[[2013,12,13]]},"reference":[{"key":"ref_1","doi-asserted-by":"crossref","first-page":"842","DOI":"10.1049\/el.2012.1279","article-title":"Design and characterization of ultra-low power SOI-CMOS IC temperature level detector","volume":"48","author":"Assaad","year":"2012","journal-title":"Electron. Lett."},{"key":"ref_2","doi-asserted-by":"crossref","unstructured":"Colinge, J.-P. (1997). Silicon-on-Insulator Technology: Materials to VLSI, Kluwer Academic Publishers. [2nd ed.].","DOI":"10.1007\/978-1-4757-2611-4"},{"key":"ref_3","doi-asserted-by":"crossref","unstructured":"Assaad, M., Boufouss, E., G\u00e9rard, P., Francis, L., and Flandre, D. (2011, January 18\u201320). Ultra Low Power CMOS Circuits Working in Subthreshold Regime for High Temperature and Radiation Environments. Oxford, UK.","DOI":"10.4071\/HITEN-Paper7-EBoufouss"},{"key":"ref_4","unstructured":"Dumitru, R., Hafer, C., Wu, T.W., Rominger, R., Gardner, H., Milliken, P., Bruno, K., and Farris, T. (2007, January 23\u201327). Radiation Hardness Characterization of a 130 nm Technology. Honolulu, HI, USA."},{"key":"ref_5","unstructured":"Ka, N.L., and Mok, P.K.T. (2001, January 18\u201320). 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Nuclear Sci."}],"container-title":["Sensors"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.mdpi.com\/1424-8220\/13\/12\/17265\/pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,10,11]],"date-time":"2025-10-11T21:51:21Z","timestamp":1760219481000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.mdpi.com\/1424-8220\/13\/12\/17265"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,12,13]]},"references-count":17,"journal-issue":{"issue":"12","published-online":{"date-parts":[[2013,12]]}},"alternative-id":["s131217265"],"URL":"https:\/\/doi.org\/10.3390\/s131217265","relation":{},"ISSN":["1424-8220"],"issn-type":[{"value":"1424-8220","type":"electronic"}],"subject":[],"published":{"date-parts":[[2013,12,13]]}}}