{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,21]],"date-time":"2026-03-21T09:08:57Z","timestamp":1774084137874,"version":"3.50.1"},"reference-count":23,"publisher":"MDPI AG","issue":"7","license":[{"start":{"date-parts":[[2018,6,30]],"date-time":"2018-06-30T00:00:00Z","timestamp":1530316800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"funder":[{"name":"Spanish Ministry of Science and Innovation and the European Social Fund (ESF)","award":["TEC2011-27047"],"award-info":[{"award-number":["TEC2011-27047"]}]},{"name":"Spanish Ministry of Science and Innovation and the European Social Fund (ESF)","award":["TEC2015-67278-R"],"award-info":[{"award-number":["TEC2015-67278-R"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Sensors"],"abstract":"<jats:p>In this paper, we share our practical experience gained during the development of CMOS-MEMS (Complementary Metal-Oxide Semiconductor Micro Electro Mechanical Systems) devices in IHP SG25 technology. The experimental prototyping process is illustrated with examples of three CMOS-MEMS chips and starts from rough process exploration and characterization, followed by the definition of the useful MEMS design space to finally reach CMOS-MEMS devices with inertial mass up to 4.3 \u03bcg and resonance frequency down to 4.35 kHz. Furthermore, the presented design techniques help to avoid several structural and reliability issues such as layer delamination, device stiction, passivation fracture or device cracking due to stress.<\/jats:p>","DOI":"10.3390\/s18072111","type":"journal-article","created":{"date-parts":[[2018,7,2]],"date-time":"2018-07-02T10:56:52Z","timestamp":1530529012000},"page":"2111","update-policy":"https:\/\/doi.org\/10.3390\/mdpi_crossmark_policy","source":"Crossref","is-referenced-by-count":18,"title":["Experiments on MEMS Integration in 0.25 \u03bcm CMOS Process"],"prefix":"10.3390","volume":"18","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-8188-325X","authenticated-orcid":false,"given":"Piotr","family":"Michalik","sequence":"first","affiliation":[{"name":"Nanusens, Av. del Parc Tecnol\u00f2gic 3, CENT \u2013 Parc Tecnol\u00f2gic del Vall\u00e8s, 08290 Cerdanyola del Vall\u00e8s, Spain"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Daniel","family":"Fern\u00e1ndez","sequence":"additional","affiliation":[{"name":"Nanusens, Av. del Parc Tecnol\u00f2gic 3, CENT \u2013 Parc Tecnol\u00f2gic del Vall\u00e8s, 08290 Cerdanyola del Vall\u00e8s, Spain"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Matthias","family":"Wietstruck","sequence":"additional","affiliation":[{"name":"IHP, Im Technologiepark 25, 15236 Frankfurt (Oder), Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mehmet","family":"Kaynak","sequence":"additional","affiliation":[{"name":"IHP, Im Technologiepark 25, 15236 Frankfurt (Oder), Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jordi","family":"Madrenas","sequence":"additional","affiliation":[{"name":"Electronic Engineering Department, Universitat Polit\u00e8cnica de Catalunya, Jordi Girona 1-3, 08034 Barcelona, Spain"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"1968","published-online":{"date-parts":[[2018,6,30]]},"reference":[{"key":"ref_1","doi-asserted-by":"crossref","first-page":"103","DOI":"10.1016\/S0924-4247(97)80100-8","article-title":"Laminated High-aspect-ratio Microstructures in a Conventional CMOS Process","volume":"57","author":"Fedder","year":"1996","journal-title":"Sens. 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