{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,12]],"date-time":"2025-10-12T04:00:35Z","timestamp":1760241635729,"version":"build-2065373602"},"reference-count":13,"publisher":"MDPI AG","issue":"7","license":[{"start":{"date-parts":[[2018,7,3]],"date-time":"2018-07-03T00:00:00Z","timestamp":1530576000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Sensors"],"abstract":"<jats:p>This paper presents a reference-voltage regulator free successive-approximation-register analog-to-digital converters (SAR ADC) with self-timed pre-charging for wireless-powered implantable medical devices. Assisted by a self-timed pre-charging technique, the proposed SAR ADC eliminates the need for a power-hungry reference-voltage regulator and area-consuming decoupling capacitor while maintaining insensitivity to the supply voltage fluctuation. Fabricated with a 0.18-\u00b5m complementary metal\u2013oxide\u2013semiconductor (CMOS) technology, the proposed SAR ADC achieves a Signal To Noise And Distortion Ratio (SNDR) of 53.32 dB operating at 0.8 V with a supply voltage fluctuation of 50 mVpp and consumes a total power of 2.72 \u00b5W at a sampling rate of 300 kS\/s. Including the self-timed pre-charging circuits, the total figure-of-merit (FOM) is 23.9 fJ\/conversion-step and the total area occupied is 0.105 mm2.<\/jats:p>","DOI":"10.3390\/s18072131","type":"journal-article","created":{"date-parts":[[2018,7,3]],"date-time":"2018-07-03T11:12:58Z","timestamp":1530616378000},"page":"2131","update-policy":"https:\/\/doi.org\/10.3390\/mdpi_crossmark_policy","source":"Crossref","is-referenced-by-count":3,"title":["A 10-Bit 300 kS\/s Reference-Voltage Regulator Free SAR ADC for Wireless-Powered Implantable Medical Devices"],"prefix":"10.3390","volume":"18","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-1159-3115","authenticated-orcid":false,"given":"Yongkui","family":"Yang","sequence":"first","affiliation":[{"name":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798, Singapore"}]},{"given":"Jun","family":"Zhou","sequence":"additional","affiliation":[{"name":"School of Information and Communication Engineering, University of Electronic Science and Technology of China, Chengdu 611731, China"}]},{"given":"Xin","family":"Liu","sequence":"additional","affiliation":[{"name":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798, Singapore"}]},{"given":"Wang Ling","family":"Goh","sequence":"additional","affiliation":[{"name":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798, Singapore"}]}],"member":"1968","published-online":{"date-parts":[[2018,7,3]]},"reference":[{"key":"ref_1","doi-asserted-by":"crossref","first-page":"978","DOI":"10.1109\/JSSC.2014.2387832","article-title":"A 13.56 MHz Wireless Power Transfer System with Reconfigurable Resonant Regulating Rectifier and Wireless Power Control for Implantable Medical Devices","volume":"50","author":"Li","year":"2015","journal-title":"IEEE J. Solid-State Circuits"},{"key":"ref_2","doi-asserted-by":"crossref","unstructured":"Borghetti, F., Nielsen, J.H., Ferragina, V., Malcovati, P., Andream, P., and Baschirotto, A. (2006, January 19\u201321). A Programmable 10b up-to-6 MS\/s SAR-ADC Featuring Constant-FoM with On-Chip Reference Voltage Buffers. Proceedings of the 32nd European Solid-State Circuits Conference, Montreux, Switzerland.","DOI":"10.1109\/ESSCIR.2006.307499"},{"key":"ref_3","doi-asserted-by":"crossref","unstructured":"Harikumar, P., and Wikner, J.J. (2015, January 24\u201327). Design of a Reference Voltage Buffer for a 10-bit 50 MS\/s SAR ADC in 65 nm CMOS. Proceedings of the IEEE International Symposium on Circuits and Systems, Lisbon, Portugal.","DOI":"10.1109\/ISCAS.2015.7168617"},{"key":"ref_4","doi-asserted-by":"crossref","unstructured":"Liu, M., Harpe, P., and Dommele, R. (2015, January 22\u201326). A 0.8 V 10 b 80 kS\/s SAR ADC with Duty-Cycled Reference Generation. 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