{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,20]],"date-time":"2026-03-20T03:49:55Z","timestamp":1773978595477,"version":"3.50.1"},"reference-count":24,"publisher":"MDPI AG","issue":"6","license":[{"start":{"date-parts":[[2019,3,13]],"date-time":"2019-03-13T00:00:00Z","timestamp":1552435200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Sensors"],"abstract":"<jats:p>This paper presents the design and analysis of a continuously tunable low noise amplifier (LNA) with an operating frequency from 2.2 GHz to 2.8 GHz. Continuous tuning is achieved through a radio frequency impedance transformer network in the input matching stage. The proposed circuit consists of four stages, namely transformer stage, tuning stage, phase shifter and gain stage. Frequency tuning is controlled by varying output current through bias voltage of tuning stage. The circuit includes an active phase shifter in the feedback path of amplifier to shift the phase of the amplified signal. Phase shift is required to further achieve tunability through transformer. The LNA achieves a maximum simulated gain of 18 dB. The LNA attains a perfect impedance match across the tuning range with stable operation. In addition, it achieves a minimum noise figure of 1.4 dB.<\/jats:p>","DOI":"10.3390\/s19061273","type":"journal-article","created":{"date-parts":[[2019,3,14]],"date-time":"2019-03-14T04:15:29Z","timestamp":1552536929000},"page":"1273","update-policy":"https:\/\/doi.org\/10.3390\/mdpi_crossmark_policy","source":"Crossref","is-referenced-by-count":10,"title":["Design and Analysis of a Continuously Tunable Low Noise Amplifier for Software Defined Radio"],"prefix":"10.3390","volume":"19","author":[{"given":"Aayush","family":"Aneja","sequence":"first","affiliation":[{"name":"Department of Electrical and Electronic Engineering, Auckland University of Technology, Auckland 1010, New Zealand"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2241-0767","authenticated-orcid":false,"given":"Xue Jun","family":"Li","sequence":"additional","affiliation":[{"name":"Department of Electrical and Electronic Engineering, Auckland University of Technology, Auckland 1010, New Zealand"}]}],"member":"1968","published-online":{"date-parts":[[2019,3,13]]},"reference":[{"key":"ref_1","doi-asserted-by":"crossref","first-page":"3186","DOI":"10.1109\/TCSI.2018.2815720","article-title":"A 0.8\u20134-GHz Software-Defined Radio Receiver With Improved Harmonic Rejection Through Non-Overlapped Clocking","volume":"65","author":"Bazrafshan","year":"2018","journal-title":"IEEE Trans. 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