{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,11]],"date-time":"2025-10-11T09:42:53Z","timestamp":1760175773370,"version":"build-2065373602"},"reference-count":17,"publisher":"MDPI AG","issue":"4","license":[{"start":{"date-parts":[[2020,2,14]],"date-time":"2020-02-14T00:00:00Z","timestamp":1581638400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Sensors"],"abstract":"<jats:p>For a complementary metal-oxide-semiconductor image sensor with highly linear, low noise and high frame rate, the nonlinear correction and frame rate improvement techniques are becoming very important. The in-pixel source follower transistor and the integration capacitor on the floating diffusion node cause linearity degradation. In order to address this problem, this paper proposes an adaptive nonlinear ramp generator circuit based on dummy pixels used in single-slope analog-to-digital converter topology for a complementary metal-oxide-semiconductor (CMOS) image sensor. In the proposed approach, the traditional linear ramp generator circuit is replaced with the new proposed adaptive nonlinear ramp generator circuit that can mitigate the nonlinearity of the pixel unit circuit, especially the gain nonlinearity of the source follower transistor and the integration capacitor nonlinearity of the floating diffusion node. Moreover, in order to enhance the frame rate and address the issue of high column fixed pattern noise, a new readout scheme of fully differential pipeline sampling quantization with a double auto-zeroing technique is proposed. Compared with the conventional readout structure without a fully differential pipeline sampling quantization technique and double auto-zeroing technique, the proposed readout scheme cannot only enhance the frame rate but can also improve the consistency of the offset and delay information of different column comparators and significantly reduce the column fixed pattern noise. The proposed techniques are simulated and verified with a prototype chip fabricated using typical 180 nm CMOS process technology. The obtained measurement results demonstrate that the overall nonlinearity of the CMOS image sensor is reduced from 1.03% to 0.047%, the efficiency of the comparator is improved from 85.3% to 100%, and the column fixed pattern noise is reduced from 0.43% to 0.019%.<\/jats:p>","DOI":"10.3390\/s20041046","type":"journal-article","created":{"date-parts":[[2020,2,20]],"date-time":"2020-02-20T03:20:03Z","timestamp":1582168803000},"page":"1046","update-policy":"https:\/\/doi.org\/10.3390\/mdpi_crossmark_policy","source":"Crossref","is-referenced-by-count":8,"title":["A Highly Linear CMOS Image Sensor Design Based on an Adaptive Nonlinear Ramp Generator and Fully Differential Pipeline Sampling Quantization with a Double Auto-Zeroing Technique"],"prefix":"10.3390","volume":"20","author":[{"given":"Chuangze","family":"Li","sequence":"first","affiliation":[{"name":"Xi\u2019an Microelectronic Technology Institute, No. 198 Taibai South Road, Yanta District, Xi\u2019an 710071, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Benguang","family":"Han","sequence":"additional","affiliation":[{"name":"School of Microelectronics, Xi dian University, No. 2 Taibai South Road, Yanta District, Xi\u2019an 710071, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jie","family":"He","sequence":"additional","affiliation":[{"name":"Xi\u2019an Microelectronic Technology Institute, No. 198 Taibai South Road, Yanta District, Xi\u2019an 710071, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Zhongjie","family":"Guo","sequence":"additional","affiliation":[{"name":"Department of Electronic Engineering, Xi\u2019an University of Technology, No. 5, Jinhua South Road, Beilin District, Xi\u2019an 710054, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Longsheng","family":"Wu","sequence":"additional","affiliation":[{"name":"Xi\u2019an Microelectronic Technology Institute, No. 198 Taibai South Road, Yanta District, Xi\u2019an 710071, China"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"1968","published-online":{"date-parts":[[2020,2,14]]},"reference":[{"key":"ref_1","unstructured":"Fei, W. (2018). Linearity Research of ACMOS Image Sensor, Delft University of Technology."},{"key":"ref_2","doi-asserted-by":"crossref","first-page":"930","DOI":"10.1109\/TCSI.2018.2872627","article-title":"Pixel optimizations and digital calibration methods of a CMOS image sensor targeting high linearity","volume":"66","author":"Wang","year":"2018","journal-title":"IEEE Trans. Circuit Syst."},{"key":"ref_3","doi-asserted-by":"crossref","first-page":"2970","DOI":"10.1109\/JSSC.2018.2856252","article-title":"Development and Evaluation of a Highly Linear CMOS Image sensor with a digitally assisted linearity calibration","volume":"53","author":"Wang","year":"2018","journal-title":"IEEE J. Solid State Circuit"},{"key":"ref_4","doi-asserted-by":"crossref","first-page":"1580","DOI":"10.1002\/cta.2425","article-title":"A 99.95% linearity readout circuit with 72 dB dynamic range for active pixel sensors","volume":"46","author":"Dias","year":"2018","journal-title":"Int. J. Circuit Theory Appl."},{"key":"ref_5","unstructured":"Wang, F., and Theuwissen, A.J.P. (2017, January 21\u201322). Techniques for pixel-level linearity optimization. Proceedings of the Workshop CMOS Image Sensors High Performance Applications, Paris, France."},{"key":"ref_6","unstructured":"Xiaoliang, G. (2012). The Design of a Global Shutter CMOS Image Sensor in 110nm Technology, Delft University."},{"key":"ref_7","first-page":"444","article-title":"Column-parallel adcs for cmos image sensors and their fom-based evaluations","volume":"E101","author":"Shoji","year":"2018","journal-title":"Ieice Trans. Electron."},{"key":"ref_8","doi-asserted-by":"crossref","first-page":"1591","DOI":"10.1109\/JSSC.2017.2661843","article-title":"A low power digitizer for back-illuminated 3-D-stacked CMOS image sensor readout with passing window and double auto-zeroing techniques","volume":"52","author":"Qiyuan","year":"2017","journal-title":"IEEE J. Solid State Circuits"},{"key":"ref_9","unstructured":"Samuel, S.I., Blanca, P.G., Espejo-Meana, S., Ragel-Morales, A., Ceballos-C\u00e1ceres, J., Mu\u00f1oz-D\u00edaz, M., Carranza-Gonz\u00e1lez, L., Arias-Drake, A., Mora-Guti\u00e9rrez, J.M., and Lagos-Florido, M.A. (2012, January 8\u201312). An adaptive approach to on-chip cmos ramp generation for high resolution single slope ADCs. Proceedings of the 21st European Conference on Circuit Theory and Design, Dresden, Germany."},{"key":"ref_10","doi-asserted-by":"crossref","unstructured":"Snoeij, M.F., Gan, P.D., Theuwissen, J.P., Makinwa, K.A.A., and Huijsing, J.H. (2007, January 11\u201315). A Cmos Image Sensor with a column-level multiple-ramp single-slope adc. Proceedings of the 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, San Francisco, CA, USA.","DOI":"10.1109\/ISSCC.2007.373516"},{"key":"ref_11","first-page":"129","article-title":"A new correlated double sampling and single slope ADC circuit for CMOS image sensors","volume":"10","author":"Lim","year":"2004","journal-title":"Int. SoC Des. Conf."},{"key":"ref_12","doi-asserted-by":"crossref","first-page":"1265","DOI":"10.1016\/j.proeng.2011.12.312","article-title":"Column parallel single slope ADC with digital correlated multiple sampling for low noise cmos image sensors","volume":"25","author":"Chen","year":"2011","journal-title":"Procedia Eng."},{"key":"ref_13","first-page":"1593","article-title":"An ultra-linear CMOS image sensor for a high\u2014Accuracy imaging system","volume":"3","author":"Masood","year":"2018","journal-title":"Int. J. Circuit Theory Appl."},{"key":"ref_14","first-page":"91","article-title":"A highly linear and high-accurate CMOS image sensor","volume":"10","author":"Masood","year":"2019","journal-title":"Analog Integr. Circuits Signal Proc."},{"key":"ref_15","unstructured":"Sudhir, M.G., Hyun, J.S., and Hon, S.P.W. (2002). Image Sensor with Dummy Pixel Array. (US6344877B1)."},{"key":"ref_16","unstructured":"Benoit, P., and Sanchez-Sinencio, E. (1999, January 30). Auto-calibrating analog timer for on-chip testing. Proceedings of the International Test Conference 1999 Proceedings, Atlantic City, NJ, USA."},{"key":"ref_17","doi-asserted-by":"crossref","first-page":"263","DOI":"10.1109\/JSSC.2002.807415","article-title":"On-chip ramp generators for mixed-signal BIST and ADC self-test","volume":"38","author":"Benoit","year":"2003","journal-title":"IEEE J. Solid State Circuits"}],"container-title":["Sensors"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.mdpi.com\/1424-8220\/20\/4\/1046\/pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,10,11]],"date-time":"2025-10-11T08:58:00Z","timestamp":1760173080000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.mdpi.com\/1424-8220\/20\/4\/1046"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,2,14]]},"references-count":17,"journal-issue":{"issue":"4","published-online":{"date-parts":[[2020,2]]}},"alternative-id":["s20041046"],"URL":"https:\/\/doi.org\/10.3390\/s20041046","relation":{},"ISSN":["1424-8220"],"issn-type":[{"type":"electronic","value":"1424-8220"}],"subject":[],"published":{"date-parts":[[2020,2,14]]}}}