{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,14]],"date-time":"2026-03-14T01:18:32Z","timestamp":1773451112335,"version":"3.50.1"},"reference-count":42,"publisher":"MDPI AG","issue":"18","license":[{"start":{"date-parts":[[2020,9,16]],"date-time":"2020-09-16T00:00:00Z","timestamp":1600214400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Sensors"],"abstract":"<jats:p>Analogue-to-digital converters (ADC) using oversampling technology and the \u03a3-\u2206 modulation mechanism are widely applied in digital audio systems. This paper presents an audio modulator with high accuracy and low power consumption by using a discrete second-order feedforward structure. A 5-bit successive approximation register (SAR) quantizer is integrated into the chip, which reduces the number of comparators and the power consumption of the quantizer compared with flash ADC-type quantizers. An analogue passive adder is used to sum the input signals and it is embedded in a SAR ADC composed of a capacitor array and a dynamic comparator which has no static power consumption. To validate the design concept, the designed modulator is developed in a 180 nm CMOS process. The peak signal to noise distortion ratio (SNDR) is calculated as 106 dB and the total power consumption of the chip is recorded as 3.654 mW at the chip supply voltage of 1.8 V. The input sine wave of 0 to 25 kHz is sampled at a sampling frequency of 3.2 Ms\/s. Moreover, the results achieve a 16-bit effective number of bits (ENOB) when the amplitude of the input signal is varied between 0.15 and 1.65 V. By comparing with other modulators which were realized by a 180 nm CMOS process, the proposed architecture outperforms with lower power consumption.<\/jats:p>","DOI":"10.3390\/s20185309","type":"journal-article","created":{"date-parts":[[2020,9,16]],"date-time":"2020-09-16T20:44:13Z","timestamp":1600289053000},"page":"5309","update-policy":"https:\/\/doi.org\/10.3390\/mdpi_crossmark_policy","source":"Crossref","is-referenced-by-count":6,"title":["A Low Power Sigma-Delta Modulator with Hybrid Architecture"],"prefix":"10.3390","volume":"20","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-6098-4222","authenticated-orcid":false,"given":"Shengbiao","family":"An","sequence":"first","affiliation":[{"name":"School of Electronic and Information Engineering, Hebei University of Technology, Tianjin 300401, China"},{"name":"School of Information Science and Engineering, Hebei University of Science and Technology, Shijiazhuang 050018, China"}]},{"given":"Shuang","family":"Xia","sequence":"additional","affiliation":[{"name":"School of Information Science and Engineering, Hebei University of Science and Technology, Shijiazhuang 050018, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8378-4466","authenticated-orcid":false,"given":"Yue","family":"Ma","sequence":"additional","affiliation":[{"name":"School of Astronomy and Space Science, University of Chinese Academy of Sciences, Beijing 100049, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-1362-3720","authenticated-orcid":false,"given":"Arfan","family":"Ghani","sequence":"additional","affiliation":[{"name":"School of Computing, Electronics and Maths (Research Institute for Future Transport and Cities), Coventry University, Coventry CV15FB, UK"}]},{"given":"Chan Hwang","family":"See","sequence":"additional","affiliation":[{"name":"School of Engineering and the Built Environment, Edinburgh Napier University, Edinburgh EH10 5DT, UK"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2972-9965","authenticated-orcid":false,"given":"Raed A.","family":"Abd-Alhameed","sequence":"additional","affiliation":[{"name":"Faculty of Engineering and Information, University of Bradford, Bradford BD7 1DP, UK"},{"name":"Department of Communication and Informatics Engineering, Basrah University College of Science and Technology, Basrah 614004, Iraq"}]},{"given":"Chuanfeng","family":"Niu","sequence":"additional","affiliation":[{"name":"The 54th Research Institute of China Electronic Technology Group Corporation, Shijiazhuang 050081, China"}]},{"given":"Ruixia","family":"Yang","sequence":"additional","affiliation":[{"name":"School of Electronic and Information Engineering, Hebei University of Technology, Tianjin 300401, China"}]}],"member":"1968","published-online":{"date-parts":[[2020,9,16]]},"reference":[{"key":"ref_1","doi-asserted-by":"crossref","first-page":"56","DOI":"10.1504\/IJBIC.2020.109001","article-title":"Frequency-dependent synaptic plasticity model for neurocomputing applications","volume":"16","author":"Khan","year":"2020","journal-title":"Int. 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