{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,11]],"date-time":"2025-10-11T03:02:50Z","timestamp":1760151770352,"version":"build-2065373602"},"reference-count":26,"publisher":"MDPI AG","issue":"8","license":[{"start":{"date-parts":[[2022,4,9]],"date-time":"2022-04-09T00:00:00Z","timestamp":1649462400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Sensors"],"abstract":"<jats:p>Testing is an important part of the design flow in the semiconductor industry. Unfortunately, it also consumes up to half of the production cost. On-silicon stimulus generators and response analyzers can be integrated with the Device-Under-Test (DUT) to reduce production costs with a minimum increment in power and area consumption. This practice is known as the Built-In Self-Test (BIST). This work presents a single-tone generator for BIST applications that is based on the Harmonic-Canceling (HC) technique. The main idea is to cancel or filter out the harmonics of a square-wave signal in order to obtain a highly pure sine wave. The design challenges of this technique are the precise implementation of irrational coefficients in silicon and the strong dependence of the output\u2019s linearity on the coefficients\u2019 precision. In order to reduce this dependence, this work introduces an irrational coefficient generator that is based on the recursive use of special matrices called skew-circulant matrices (SCMs). A complete study of the SCM-based HC synthesizer, its properties, and the proposed implementation in 180 nm CMOS technology are presented. The measured results show that the proposed HC synthesizer is able to filter out up to the 47th harmonic of a given square wave and to generate signals from 0.8 to 100 MHz with a maximum Spurious-Free Dynamic Range (SFDR) of 66 dB.<\/jats:p>","DOI":"10.3390\/s22082884","type":"journal-article","created":{"date-parts":[[2022,4,9]],"date-time":"2022-04-09T05:13:08Z","timestamp":1649481188000},"page":"2884","update-policy":"https:\/\/doi.org\/10.3390\/mdpi_crossmark_policy","source":"Crossref","is-referenced-by-count":3,"title":["Skew-Circulant-Matrix-Based Harmonic-Canceling Synthesizer for BIST Applications"],"prefix":"10.3390","volume":"22","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-4363-7533","authenticated-orcid":false,"given":"Guillermo G.","family":"Garayar-Leyva","sequence":"first","affiliation":[{"name":"Electrical and Computer Engineering Department, Texas A&M University, College Station, TX 77843, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5125-5498","authenticated-orcid":false,"given":"Hatem","family":"Osman","sequence":"additional","affiliation":[{"name":"Silicon Labs, Austin, TX 78701, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6064-0371","authenticated-orcid":false,"given":"Johan J.","family":"Estrada-L\u00f3pez","sequence":"additional","affiliation":[{"name":"Physics and Engineering, Westmont College, Santa Barbara, CA 93108, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2001-6547","authenticated-orcid":false,"given":"Oscar","family":"Moreira-Tamayo","sequence":"additional","affiliation":[{"name":"Electrical and Computer Engineering Department, Texas A&M University, College Station, TX 77843, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"1968","published-online":{"date-parts":[[2022,4,9]]},"reference":[{"key":"ref_1","unstructured":"Stroud, C.E. (2002). An Overview of BIST. A Designer\u2019s Guide to Built-In Self-Test, Springer."},{"key":"ref_2","doi-asserted-by":"crossref","unstructured":"Garayar-Leyva, G.G., Osman, H., Estrada-L\u00f3pez, J.J., and S\u00e1nchez-Sinencio, E. (2020, January 12\u201314). A Harmonic-Canceling Synthesizer using Skew-Circulant-Matrix-Based Coefficient Generator. Proceedings of the 2020 IEEE International Symposium on Circuits and Systems (ISCAS), Seville, Spain.","DOI":"10.1109\/ISCAS45731.2020.9181146"},{"key":"ref_3","doi-asserted-by":"crossref","first-page":"151","DOI":"10.1049\/iet-cds:20060072","article-title":"Low THD bandpass-based oscillator using multilevel hard limiter","volume":"1","author":"Bahmani","year":"2007","journal-title":"IET Circuits Devices Syst."},{"key":"ref_4","doi-asserted-by":"crossref","first-page":"2421","DOI":"10.1109\/JSSC.2007.907167","article-title":"Nonlinear Shaping SC Oscillator With Enhanced Linearity","volume":"42","author":"Park","year":"2007","journal-title":"IEEE J. Solid-State Circuits"},{"key":"ref_5","doi-asserted-by":"crossref","first-page":"1235","DOI":"10.1109\/JSSC.2002.803008","article-title":"A 100-MHz 8-mW ROM-less quadrature direct digital frequency synthesizer","volume":"37","author":"Mohieldin","year":"2002","journal-title":"IEEE J. Solid-State Circuits"},{"key":"ref_6","doi-asserted-by":"crossref","first-page":"761","DOI":"10.1109\/JSSC.2004.826323","article-title":"An 800-MHz low-power direct digital frequency synthesizer with an on-chip D\/a converter","volume":"39","author":"Choi","year":"2004","journal-title":"IEEE J. Solid-State Circuits"},{"key":"ref_7","doi-asserted-by":"crossref","first-page":"1845","DOI":"10.1109\/JSSC.2010.2056830","article-title":"A 1.3-GHz 350-mW Hybrid Direct Digital Frequency Synthesizer in 90-nm CMOS","volume":"45","author":"Yeoh","year":"2010","journal-title":"IEEE J. Solid-State Circuits"},{"key":"ref_8","doi-asserted-by":"crossref","first-page":"2976","DOI":"10.1109\/JSSC.2014.2359674","article-title":"A 2 GHz 130 mW Direct-Digital Frequency Synthesizer with a Nonlinear DAC in 55 nm CMOS","volume":"49","author":"Yoo","year":"2014","journal-title":"IEEE J. Solid-State Circuits"},{"key":"ref_9","doi-asserted-by":"crossref","first-page":"2064","DOI":"10.1109\/JSSC.2011.2145290","article-title":"A 5-GHz Direct Digital Frequency Synthesizer Using an Analog-Sine-Mapping Technique in 0.35-\u03bcm SiGe BiCMOS","volume":"46","author":"Yang","year":"2011","journal-title":"IEEE J. Solid-State Circuits"},{"key":"ref_10","doi-asserted-by":"crossref","first-page":"1061","DOI":"10.1109\/JSSC.2010.2043885","article-title":"A Low THD, Low Power, High Output-Swing Time-Mode-Based Tunable Oscillator via Digital Harmonic-Cancellation Technique","volume":"45","author":"Elsayed","year":"2010","journal-title":"IEEE J. Solid-State Circuits"},{"key":"ref_11","doi-asserted-by":"crossref","unstructured":"Soda, M., Bando, Y., Takaya, S., Ohkawa, T., Takaramoto, T., Yamada, T., Kumashiro, S., Mogami, T., and Nagata, M. (2010, January 8\u201310). On-chip sine-wave noise generator for analog IP noise tolerance measurements. Proceedings of the 2010 IEEE Asian Solid-State Circuits Conference, Beijing, China.","DOI":"10.1109\/ASSCC.2010.5716573"},{"key":"ref_12","doi-asserted-by":"crossref","first-page":"67","DOI":"10.1007\/s10470-014-0456-0","article-title":"On-chip sinusoidal signal generation with harmonic cancelation for analog and mixed-signal BIST applications","volume":"82","author":"Barragan","year":"2015","journal-title":"Analog. Integr. Circuits Signal Process."},{"key":"ref_13","doi-asserted-by":"crossref","first-page":"2227","DOI":"10.1109\/TCSI.2015.2459552","article-title":"150\u2013850 MHz High-Linearity Sine-wave Synthesizer Architecture Based on FIR Filter Approach and SFDR Optimization","volume":"62","author":"Shi","year":"2015","journal-title":"IEEE Trans. Circuits Syst. I Regul. Pap."},{"key":"ref_14","doi-asserted-by":"crossref","first-page":"296","DOI":"10.1109\/TCSI.2016.2613938","article-title":"Partial Dynamic Element Matching Technique for Digital-to-Analog Converters Used for Digital Harmonic-Cancelling Sine-Wave Synthesis","volume":"64","author":"Aluthwala","year":"2017","journal-title":"IEEE Trans. Circuits Syst. I Regul. Pap."},{"key":"ref_15","doi-asserted-by":"crossref","unstructured":"Malloug, H., Barragan, M.J., and Mir, S. (2019, January 27\u201331). A 52 dB-SFDR 166 MHz sinusoidal signal generator for mixed-signal BIST applications in 28 nm FDSOI technology. Proceedings of the 2019 IEEE European Test Symposium (ETS), Baden-Baden, Germany.","DOI":"10.1109\/ETS.2019.8791532"},{"key":"ref_16","doi-asserted-by":"crossref","first-page":"2105","DOI":"10.1109\/JSSC.2017.2690872","article-title":"On-Chip Two-Tone Synthesizer Based on a Mixing-FIR Architecture","volume":"52","author":"Shi","year":"2017","journal-title":"IEEE J. Solid-State Circuits"},{"key":"ref_17","doi-asserted-by":"crossref","unstructured":"Ahmad, S., Azizi, K., Zadeh, I.E., and Dabrowski, J. (June, January 30). Two-tone PLL for on-chip IP3 test. Proceedings of the 2010 IEEE International Symposium on Circuits and Systems, Paris, France.","DOI":"10.1109\/ISCAS.2010.5537812"},{"key":"ref_18","doi-asserted-by":"crossref","first-page":"205","DOI":"10.1007\/s10836-005-6351-y","article-title":"An On-Chip Spectrum Analyzer for Analog Built-In Testing","volume":"21","author":"Valdes","year":"2005","journal-title":"J. Electron. Test."},{"key":"ref_19","unstructured":"Jose, A., Jenkins, K., and Reynolds, S. (2005, January 1\u20135). On-chip spectrum analyzer for analog built-in self test. Proceedings of the 23rd IEEE VLSI Test Symposium (VTS\u201905), Palm Strings, CA, USA."},{"key":"ref_20","doi-asserted-by":"crossref","unstructured":"Shoghi, P., Weldon, T.P., and Barnwell, C.J. (2009, January 5\u20138). Experimental results for a Successive Detection Log Video Amplifier in a single-chip frequency synthesized radio frequency spectrum analyzer. Proceedings of the IEEE Southeastcon 2009, Atlanta, GA, USA.","DOI":"10.1109\/SECON.2009.5174109"},{"key":"ref_21","doi-asserted-by":"crossref","unstructured":"Nose, K., and Mizuno, M. (2007, January 14\u201316). A 0.016 mm2, 2.4 GHz RF signal quality measurement macro for RF test and diagnosis. Proceedings of the 2007 IEEE Symposium on VLSI Circuits, Kyoto, Japan.","DOI":"10.1109\/VLSIC.2007.4342723"},{"key":"ref_22","doi-asserted-by":"crossref","first-page":"497","DOI":"10.1109\/TVLSI.2013.2251919","article-title":"Accurate and Efficient On-Chip Spectral Analysis for Built-In Testing and Calibration Approaches","volume":"22","author":"Chauhan","year":"2014","journal-title":"IEEE Trans. Very Large Scale Integr. (VLSI) Syst."},{"key":"ref_23","doi-asserted-by":"crossref","unstructured":"Choi, Y., Chang, C.H., Jung, I.S., Onabajo, M., and Kim, Y.B. (2014, January 1\u20133). A built-in calibration system with a reduced FFT engine for linearity optimization of low power LNA. Proceedings of the 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), Amsterdam, The Netherlands.","DOI":"10.1109\/DFT.2014.6962077"},{"key":"ref_24","doi-asserted-by":"crossref","first-page":"897","DOI":"10.1109\/TCSI.2018.2873786","article-title":"An On-Chip Built-in Linearity Estimation Methodology and Hardware Implementation","volume":"66","author":"Shi","year":"2019","journal-title":"IEEE Trans. Circuits Syst. I Regul. Pap."},{"key":"ref_25","doi-asserted-by":"crossref","first-page":"97","DOI":"10.1109\/TIM.1969.4313775","article-title":"Digital Generation of Low-Frequency Sine Waves","volume":"18","author":"Davies","year":"1969","journal-title":"IEEE Trans. Instrum. Meas."},{"key":"ref_26","doi-asserted-by":"crossref","unstructured":"Gray, R.M. (2006). Circulant Matrices. Toeplitz and Circulant Matrices: A Review, Now Publishers Inc.","DOI":"10.1561\/9781933019680"}],"container-title":["Sensors"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.mdpi.com\/1424-8220\/22\/8\/2884\/pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,10,10]],"date-time":"2025-10-10T22:50:54Z","timestamp":1760136654000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.mdpi.com\/1424-8220\/22\/8\/2884"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,4,9]]},"references-count":26,"journal-issue":{"issue":"8","published-online":{"date-parts":[[2022,4]]}},"alternative-id":["s22082884"],"URL":"https:\/\/doi.org\/10.3390\/s22082884","relation":{},"ISSN":["1424-8220"],"issn-type":[{"type":"electronic","value":"1424-8220"}],"subject":[],"published":{"date-parts":[[2022,4,9]]}}}