{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,10]],"date-time":"2026-04-10T16:27:39Z","timestamp":1775838459038,"version":"3.50.1"},"reference-count":20,"publisher":"MDPI AG","issue":"8","license":[{"start":{"date-parts":[[2022,8,9]],"date-time":"2022-08-09T00:00:00Z","timestamp":1660003200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"funder":[{"name":"National Natural Science Foundation of China Youth","award":["62004146"],"award-info":[{"award-number":["62004146"]}]},{"name":"National Natural Science Foundation of China Youth","award":["2021M692498"],"award-info":[{"award-number":["2021M692498"]}]},{"name":"National Natural Science Foundation of China Youth","award":["ZHD202006"],"award-info":[{"award-number":["ZHD202006"]}]},{"name":"National Natural Science Foundation of China Youth","award":["2021A1515012293"],"award-info":[{"award-number":["2021A1515012293"]}]},{"name":"China Postdoctoral Science Foundation","award":["62004146"],"award-info":[{"award-number":["62004146"]}]},{"name":"China Postdoctoral Science Foundation","award":["2021M692498"],"award-info":[{"award-number":["2021M692498"]}]},{"name":"China Postdoctoral Science Foundation","award":["ZHD202006"],"award-info":[{"award-number":["ZHD202006"]}]},{"name":"China Postdoctoral Science Foundation","award":["2021A1515012293"],"award-info":[{"award-number":["2021A1515012293"]}]},{"name":"Opening Project of Science and Technology on Reliability Physics and Application Technology of Electronic Component Laboratory","award":["62004146"],"award-info":[{"award-number":["62004146"]}]},{"name":"Opening Project of Science and Technology on Reliability Physics and Application Technology of Electronic Component Laboratory","award":["2021M692498"],"award-info":[{"award-number":["2021M692498"]}]},{"name":"Opening Project of Science and Technology on Reliability Physics and Application Technology of Electronic Component Laboratory","award":["ZHD202006"],"award-info":[{"award-number":["ZHD202006"]}]},{"name":"Opening Project of Science and Technology on Reliability Physics and Application Technology of Electronic Component Laboratory","award":["2021A1515012293"],"award-info":[{"award-number":["2021A1515012293"]}]},{"name":"Natural Science Foundation of Guangdong, China","award":["62004146"],"award-info":[{"award-number":["62004146"]}]},{"name":"Natural Science Foundation of Guangdong, China","award":["2021M692498"],"award-info":[{"award-number":["2021M692498"]}]},{"name":"Natural Science Foundation of Guangdong, China","award":["ZHD202006"],"award-info":[{"award-number":["ZHD202006"]}]},{"name":"Natural Science Foundation of Guangdong, China","award":["2021A1515012293"],"award-info":[{"award-number":["2021A1515012293"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Symmetry"],"abstract":"<jats:p>Mapping optimization of network-on-chips (NoCs) for specific applications has become one of the most important keys of the SoC top-level design. However, the topology of NoC applied is usually regular topology, such as mesh, torus, etc., which may generate a large number of isomorphic solutions during the process of NoC mapping, which may reduce the convergence speed of mapping algorithms. In this paper, we proposed a generic-based hyper-heuristic algorithm named IRC-GHH for NoC mapping. To reduce the influence of isomorphic solutions, we analyzed the symmetry of NoC topology and proposed crossover operators based on the isomorphic solution to optimize the algorithm. We studied the situation of invalid crossovers and eliminated invalid iterations by adopting an isomorphic replacement crossover (IRC) strategy. To prevent the algorithm from falling into evolutionary stagnation in the late iteration, we introduce an adaptive mechanism to increase the usage frequency of the IRC operator automatically. Compared with GHH without IRC, the GHH with IRC can achieve, on average 15.25% communication energy reduction and 7.84% communication delay reduction.<\/jats:p>","DOI":"10.3390\/sym14081637","type":"journal-article","created":{"date-parts":[[2022,8,10]],"date-time":"2022-08-10T09:47:06Z","timestamp":1660124826000},"page":"1637","update-policy":"https:\/\/doi.org\/10.3390\/mdpi_crossmark_policy","source":"Crossref","is-referenced-by-count":5,"title":["Optimization Strategy of Regular NoC Mapping Using Genetic-Based Hyper-Heuristic Algorithm"],"prefix":"10.3390","volume":"14","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-3827-8820","authenticated-orcid":false,"given":"Changqing","family":"Xu","sequence":"first","affiliation":[{"name":"Guangzhou Institute of Technology, Xidian University, Guangzhou 510555, China"},{"name":"School of Microelectronics, Xidian University, Xi\u2019an 710071, China"}]},{"given":"Jiahao","family":"Ning","sequence":"additional","affiliation":[{"name":"School of Microelectronics, Xidian University, Xi\u2019an 710071, China"}]},{"given":"Yi","family":"Liu","sequence":"additional","affiliation":[{"name":"School of Microelectronics, Xidian University, Xi\u2019an 710071, China"}]},{"given":"Mintao","family":"Luo","sequence":"additional","affiliation":[{"name":"Xi\u2019an Microelectronics Technology, Xi\u2019an 710054, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5065-4374","authenticated-orcid":false,"given":"Dongdong","family":"Chen","sequence":"additional","affiliation":[{"name":"School of Microelectronics, Xidian University, Xi\u2019an 710071, China"}]},{"given":"Xiaoling","family":"Lin","sequence":"additional","affiliation":[{"name":"China Electronic Product Reliability and Environment Research, Guangzhou 510610, China"}]},{"given":"Yintang","family":"Yang","sequence":"additional","affiliation":[{"name":"School of Microelectronics, Xidian University, Xi\u2019an 710071, China"}]}],"member":"1968","published-online":{"date-parts":[[2022,8,9]]},"reference":[{"key":"ref_1","doi-asserted-by":"crossref","first-page":"34","DOI":"10.1109\/MM.2016.25","article-title":"Knights Landing: Second-Generation Intel Xeon Phi Product","volume":"36","author":"Sodani","year":"2016","journal-title":"IEEE Micro"},{"key":"ref_2","doi-asserted-by":"crossref","unstructured":"Gangwar, A., Xu, Z., Agarwal, N.K., Sreedharan, R., and Prasad, A. (2019, January 19). Traffic Driven Automated Synthesis of Network-on-Chip from Physically Aware Behavioral Specification. Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Miami, FL, USA.","DOI":"10.1109\/ISVLSI.2019.00031"},{"key":"ref_3","doi-asserted-by":"crossref","unstructured":"Liao, W., Deng, H., Luo, Y., Xiao, S., Li, C., and Yu, Z. (2019, January 13\u201315). An Efficient and Low-Overhead Chip-to-Chip Interconnect Protocol Design for NOC. Proceedings of the 2019 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA), Chengdu, China.","DOI":"10.1109\/ICTA48799.2019.9012828"},{"key":"ref_4","first-page":"1","article-title":"A Primer on Memory Consistency and Cache Coherence","volume":"6","author":"Sorin","year":"2011","journal-title":"Morgan Claypool"},{"key":"ref_5","doi-asserted-by":"crossref","unstructured":"Tayu, S., and Ueno, S. (2014, January 17\u201320). A note on the energy-aware mapping for NoCs. Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), Ishigaki, Japan.","DOI":"10.1109\/APCCAS.2014.7032864"},{"key":"ref_6","doi-asserted-by":"crossref","unstructured":"Zhong, L., Sheng, J., Jing, M., Yu, Z., Zeng, X., and Zhou, D. (2011, January 25\u201328). An optimized mapping algorithm based on Simulated Annealing for regular NoC architecture. Proceedings of the 2011 9th IEEE International Conference on ASIC, Xiamen, China.","DOI":"10.1109\/ASICON.2011.6157203"},{"key":"ref_7","doi-asserted-by":"crossref","first-page":"662","DOI":"10.1109\/TPDS.2016.2589934","article-title":"A Multi-Objective Model Oriented Mapping Approach for NoC-based Computing Systems","volume":"28","author":"Wu","year":"2017","journal-title":"IEEE Trans. Parallel Distrib. Syst."},{"key":"ref_8","doi-asserted-by":"crossref","unstructured":"Zhang, L., Li, S., Qu, L., Kang, Z., Wang, S., Chen, J., and Wang, L. (2020, January 14\u201316). MAMAP: Congestion Relieved Memetic Algorithm based Mapping Method for Mapping Large-Scale SNNs onto NoC-based Neuromorphic Hardware. Proceedings of the 2020 IEEE 22nd International Conference on High Performance Computing and Communications, Yanuca Island, Cuvu, Fiji. IEEE 18th International Conference on Smart City; IEEE 6th International Conference on Data Science and Systems (HPCC\/SmartCity\/DSS).","DOI":"10.1109\/HPCC-SmartCity-DSS50907.2020.00082"},{"key":"ref_9","doi-asserted-by":"crossref","first-page":"45935","DOI":"10.1109\/ACCESS.2021.3066537","article-title":"Flexible Spare Core Placement in Torus Topology Based NoCs and Its Validation on an FPGA","volume":"9","author":"Bhanu","year":"2021","journal-title":"IEEE Access"},{"key":"ref_10","doi-asserted-by":"crossref","unstructured":"Kullu, P., and Tosun, S. (2019, January 28\u201330). MARM-GA: Mapping Applications to Reconfigurable Mesh using Genetic Algorithm. Proceedings of the 2019 22nd Euromicro Conference on Digital System Design (DSD), Kallithea, Greece.","DOI":"10.1109\/DSD.2019.00013"},{"key":"ref_11","unstructured":"Rocha, H.M.G.d., Beck, A.C.S., Maia, S.M.D.M., Kreutz, M.E., and Pereira, M.M. (2020, January 24\u201327). A Routing based Genetic Algorithm for Task Mapping on MPSoC. Proceedings of the 2020 X Brazilian Symposium on Computing Systems Engineering (SBESC), Florianopolis, Brazil."},{"key":"ref_12","doi-asserted-by":"crossref","first-page":"104493","DOI":"10.1016\/j.micpro.2022.104493","article-title":"iHPSA: An improved bio-inspired hybrid optimization algorithm for task mapping in Network on Chip","volume":"90","author":"Amin","year":"2022","journal-title":"Microprocess. Microsyst."},{"key":"ref_13","unstructured":"Khalifa, Y.M.A. (2003, January 14\u201317). Isomorphism elimination to enhanced design centering of analog circuits using GA and the regionalization method. Proceedings of the 10th IEEE International Conference on Electronics, Circuits and Systems, 2003, Sharjah, United Arab Emirates. Proceedings of the 2003."},{"key":"ref_14","doi-asserted-by":"crossref","first-page":"272","DOI":"10.1049\/iet-cdt.2019.0212","article-title":"Network-on-chip heuristic mapping algorithm based on isomorphism elimination for NoC optimisation","volume":"14","author":"Weng","year":"2020","journal-title":"IET Comput. Digit. Tech."},{"key":"ref_15","doi-asserted-by":"crossref","first-page":"20170769","DOI":"10.1587\/elex.14.20170769","article-title":"An efficient energy and thermal-aware mapping for regular network-on-chip","volume":"14","author":"Xu","year":"2017","journal-title":"Ieice Electron. Express"},{"key":"ref_16","doi-asserted-by":"crossref","unstructured":"Elmiligi, H., El-Kharashi, M.W., and Gebali, F. (2006, January 27\u201329). A Delay Model for Networks-on-Chip Output-Queuing Router. Proceedings of the 2006 6th International Workshop on System on Chip for Real Time Applications, Cairo, Egypt.","DOI":"10.1109\/IWSOC.2006.348272"},{"key":"ref_17","doi-asserted-by":"crossref","first-page":"158","DOI":"10.1049\/iet-cdt.2017.0156","article-title":"Unified multi-objective mapping for network-on-chip using genetic based hyper-heuristic algorithms","volume":"12","author":"Xu","year":"2018","journal-title":"IET Comput. Digit. Tech."},{"key":"ref_18","doi-asserted-by":"crossref","first-page":"60","DOI":"10.1016\/j.sysarc.2012.10.004","article-title":"A survey on application mapping strategies for Network-on-Chip design","volume":"59","author":"Sahu","year":"2013","journal-title":"J. Syst. Archit."},{"key":"ref_19","doi-asserted-by":"crossref","first-page":"63607","DOI":"10.1109\/ACCESS.2020.2982675","article-title":"Performance Evaluation of Application Mapping Approaches for Network-on-Chip Designs","volume":"8","author":"Amin","year":"2020","journal-title":"IEEE Access"},{"key":"ref_20","doi-asserted-by":"crossref","unstructured":"Dick, R.P., Rhodes, D.L., and Wolf, W. (1998, January 18). TGFF: Task graphs for free. Proceedings of the Sixth International Workshop on Hardware\/Software Codesign. (CODES\/CASHE\u201998), Seattle, WA, USA.","DOI":"10.1145\/278241.278309"}],"container-title":["Symmetry"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.mdpi.com\/2073-8994\/14\/8\/1637\/pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,10,11]],"date-time":"2025-10-11T00:06:20Z","timestamp":1760141180000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.mdpi.com\/2073-8994\/14\/8\/1637"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,8,9]]},"references-count":20,"journal-issue":{"issue":"8","published-online":{"date-parts":[[2022,8]]}},"alternative-id":["sym14081637"],"URL":"https:\/\/doi.org\/10.3390\/sym14081637","relation":{},"ISSN":["2073-8994"],"issn-type":[{"value":"2073-8994","type":"electronic"}],"subject":[],"published":{"date-parts":[[2022,8,9]]}}}