{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,10,14]],"date-time":"2026-10-14T21:31:15Z","timestamp":1792013475541,"version":"4.4.0"},"reference-count":45,"publisher":"MDPI AG","issue":"6","license":[{"start":{"date-parts":[[2026,6,14]],"date-time":"2026-06-14T00:00:00Z","timestamp":1781395200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"funder":[{"DOI":"10.13039\/501100003725","name":"National Research Foundation of Korea","doi-asserted-by":"publisher","award":["RS-2024-00432642"],"award-info":[{"award-number":["RS-2024-00432642"]}],"id":[{"id":"10.13039\/501100003725","id-type":"DOI","asserted-by":"publisher"}]},{"award":["RS-2024-00432642"],"award-info":[{"award-number":["RS-2024-00432642"]}],"id":[{"id":"https:\/\/ror.org\/013aysd81","id-type":"ROR","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100003052","name":"Ministry of Trade, Industry and Energy","doi-asserted-by":"publisher","award":["RS-2024-00432245"],"award-info":[{"award-number":["RS-2024-00432245"]}],"id":[{"id":"10.13039\/501100003052","id-type":"DOI","asserted-by":"publisher"}]},{"award":["RS-2024-00432245"],"award-info":[{"award-number":["RS-2024-00432245"]}],"id":[{"id":"https:\/\/ror.org\/008nkqk13","id-type":"ROR","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Micromachines"],"abstract":"<jats:p>Recent advances in chiplet architectures, heterogeneous integration, 2.5D\/3D packaging, high-performance computing, and RF applications have increased the demand for high-density vertical interconnects and low-loss packaging platforms. Glass substrates have attracted considerable attention for next-generation advanced packaging because of their low dielectric loss, high dimensional stability, smooth surface, and compatibility with large-area panel-level processing. Through-glass vias (TGVs) are essential vertical interconnect structures that enable the electrical integration of glass substrates. This focused review summarizes TGV technologies for glass-based advanced packaging from the perspectives of via formation, seed layer deposition, metallization, Cu filling, defect formation, reliability, and plugging-based alternative architectures. Representative TGV formation methods, including laser drilling, selective laser etching, laser-induced deep etching, wet\/dry etching, and photosensitive glass processing, are compared. Metallization approaches based on sputtering, electroless plating, ALD\/CVD, and hybrid processes are discussed together with Cu electroplating strategies such as conformal plating, bottom-up filling, pulse or pulse-reverse plating, and engineered-geometry filling. Key defects, including voids, seams, pinch-off, seed discontinuity, Cu\/glass interfacial delamination, glass cracking, and Cu protrusion, are reviewed in relation to thermomechanical reliability. Finally, polymer\/dielectric plugging, plugging\/re-drilling, conductive paste plugging, and hybrid Cu\/plugging structures are discussed as application-specific alternatives for balancing electrical performance, reliability, manufacturability, yield, and cost.<\/jats:p>","DOI":"10.3390\/mi17060720","type":"journal-article","created":{"date-parts":[[2026,6,17]],"date-time":"2026-06-17T05:56:31Z","timestamp":1781675791000},"page":"720","update-policy":"https:\/\/doi.org\/10.3390\/mdpi_crossmark_policy","source":"Crossref","is-referenced-by-count":3,"title":["Process Integration and Reliability Challenges of Through-Glass Vias for Glass-Based Advanced Packaging: A Focused Review"],"prefix":"10.3390","volume":"17","author":[{"given":"Dong Bae","family":"Park","sequence":"first","affiliation":[{"name":"Center for Cooperative Research Facilities, Tech University of Korea, 65 Emtibeuibuk-ro, Siheung-si 15119, Gyeonggi-do, Republic of Korea"},{"name":"Department of Advanced Materials Engineering, Tech University of Korea, 237 Sangidaehak-ro, Siheung-si 15073, Gyeonggi-do, Republic of Korea"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jinho","family":"Jo","sequence":"additional","affiliation":[{"name":"ICT Device Packaging Research Center, Korea Electronics Technology Institute, 25 Saenari-ro, Bundang-gu, Seongnam-si 13509, Gyeonggi-do, Republic of Korea"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Seonwoo","family":"Kim","sequence":"additional","affiliation":[{"name":"ICT Device Packaging Research Center, Korea Electronics Technology Institute, 25 Saenari-ro, Bundang-gu, Seongnam-si 13509, Gyeonggi-do, Republic of Korea"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Da-Yeong","family":"Lee","sequence":"additional","affiliation":[{"name":"ICT Device Packaging Research Center, Korea Electronics Technology Institute, 25 Saenari-ro, Bundang-gu, Seongnam-si 13509, Gyeonggi-do, Republic of Korea"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Suin","family":"Chae","sequence":"additional","affiliation":[{"name":"ICT Device Packaging Research Center, Korea Electronics Technology Institute, 25 Saenari-ro, Bundang-gu, Seongnam-si 13509, Gyeonggi-do, Republic of Korea"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-0852-3626","authenticated-orcid":false,"given":"Soobin","family":"Park","sequence":"additional","affiliation":[{"name":"ICT Device Packaging Research Center, Korea Electronics Technology Institute, 25 Saenari-ro, Bundang-gu, Seongnam-si 13509, Gyeonggi-do, Republic of Korea"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Se-Hoon","family":"Park","sequence":"additional","affiliation":[{"name":"ICT Device Packaging Research Center, Korea Electronics Technology Institute, 25 Saenari-ro, Bundang-gu, Seongnam-si 13509, Gyeonggi-do, Republic of Korea"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0009-0001-8816-1479","authenticated-orcid":false,"given":"Tae-Young","family":"Lee","sequence":"additional","affiliation":[{"name":"Center for Cooperative Research Facilities, Tech University of Korea, 65 Emtibeuibuk-ro, Siheung-si 15119, Gyeonggi-do, Republic of Korea"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Kyoung-Min","family":"Kim","sequence":"additional","affiliation":[{"name":"Center for Cooperative Research Facilities, Tech University of Korea, 65 Emtibeuibuk-ro, Siheung-si 15119, Gyeonggi-do, Republic of Korea"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Nam Son","family":"Park","sequence":"additional","affiliation":[{"name":"Center for Cooperative Research Facilities, Tech University of Korea, 65 Emtibeuibuk-ro, Siheung-si 15119, Gyeonggi-do, Republic of Korea"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-1396-8534","authenticated-orcid":false,"given":"Seong-Eui","family":"Lee","sequence":"additional","affiliation":[{"name":"Department of Advanced Materials Engineering, Tech University of Korea, 237 Sangidaehak-ro, Siheung-si 15073, Gyeonggi-do, Republic of Korea"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Sang O","family":"Kim","sequence":"additional","affiliation":[{"name":"ICT Device Packaging Research Center, Korea Electronics Technology Institute, 65 Emtibeuibuk-ro, Siheung-si 15119, Gyeonggi-do, Republic of Korea"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-2252-5962","authenticated-orcid":false,"given":"Hyunjin","family":"Nam","sequence":"additional","affiliation":[{"name":"ICT Device Packaging Research Center, Korea Electronics Technology Institute, 65 Emtibeuibuk-ro, Siheung-si 15119, Gyeonggi-do, Republic of Korea"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"1968","published-online":{"date-parts":[[2026,6,14]]},"reference":[{"key":"ref_1","doi-asserted-by":"crossref","first-page":"010801","DOI":"10.1115\/1.4062529","article-title":"Recent Advances and Trends in Chiplet Design and Heterogeneous Integration Packaging","volume":"146","author":"Lau","year":"2024","journal-title":"J. Electron. Packag."},{"key":"ref_2","doi-asserted-by":"crossref","first-page":"425","DOI":"10.1038\/s41928-024-01175-3","article-title":"Advanced Packaging of Chiplets for Future Computing Needs","volume":"7","author":"Mahajan","year":"2024","journal-title":"Nat. Electron."},{"key":"ref_3","unstructured":"IEEE Electronics Packaging Society (2026, May 13). Heterogeneous Integration Roadmap 2021 Edition. Available online: https:\/\/eps.ieee.org\/technology\/heterogeneous-integration-roadmap\/2021-edition\/."},{"key":"ref_4","first-page":"1033","article-title":"Heterogeneous Packaging Technologies for Chiplet and Memory Integration","volume":"2024","author":"Li","year":"2024","journal-title":"IMAPSource Proc."},{"key":"ref_5","doi-asserted-by":"crossref","first-page":"244","DOI":"10.1038\/s41928-024-01126-y","article-title":"High-Performance, Power-Efficient Three-Dimensional System-in-Package Designs with Universal Chiplet Interconnect Express","volume":"7","author":"Pasdast","year":"2024","journal-title":"Nat. Electron."},{"key":"ref_6","doi-asserted-by":"crossref","unstructured":"Chen, Z., Yu, D., and Zhong, Y. (2022). Development of 3D Wafer Level Hermetic Packaging with Through Glass Vias (TGVs) and Transient Liquid Phase Bonding Technology for RF Filter. Sensors, 22.","DOI":"10.3390\/s22062114"},{"key":"ref_7","doi-asserted-by":"crossref","unstructured":"Nimbalkar, P., Bhaskar, P., Vijay Kumar, L.N., Narayanan, M., Torres, E., Venkataramanan, S.S.A., and Kathaperumal, M. (2025). A Review of Glass Substrate Technologies. Chips, 4.","DOI":"10.3390\/chips4030037"},{"key":"ref_8","unstructured":"IDTechEx (2026, May 13). Glass Interposers and Substrates in Advanced Packaging. Available online: https:\/\/www.idtechex.com\/en\/research-article\/glass-interposers-and-substrates-in-advanced-packaging\/33856."},{"key":"ref_9","unstructured":"Yole Group (2026, May 13). Glass Core Substrates: The New Race for Advanced Packaging Giants. Available online: https:\/\/www.yolegroup.com\/strategy-insights\/glass-core-substrates-the-new-race-for-advanced-packaging-giants."},{"key":"ref_10","doi-asserted-by":"crossref","first-page":"1790","DOI":"10.1007\/s10854-023-11185-0","article-title":"Development of High Performance 2.5D Packaging Using Glass Interposer with Through Glass Via","volume":"34","author":"Zhao","year":"2023","journal-title":"J. Mater. Sci. Mater. Electron."},{"key":"ref_11","doi-asserted-by":"crossref","unstructured":"Yu, C., Wu, S., Zhong, Y., Xu, R., Yu, T., Zhao, J., and Yu, D. (2024). Application of Through Glass Via (TGV) Technology for Sensors Manufacturing and Packaging. Sensors, 24.","DOI":"10.20944\/preprints202312.0064.v1"},{"key":"ref_12","doi-asserted-by":"crossref","first-page":"165","DOI":"10.5781\/JWJ.2024.42.2.2","article-title":"Recent Progress of TGV Technology for High Performance Semiconductor Packaging","volume":"42","author":"Seok","year":"2024","journal-title":"J. Weld. Join."},{"key":"ref_13","doi-asserted-by":"crossref","first-page":"131517","DOI":"10.1016\/j.optcom.2025.131517","article-title":"High-Speed Wafer-Level TGV Interposer for 2.5D CPO","volume":"579","author":"Ge","year":"2025","journal-title":"Opt. Commun."},{"key":"ref_14","first-page":"210446","article-title":"Development Status of Copper Electroplating Filling Technology in Through Glass Via for 3D Interconnections","volume":"28","author":"Ji","year":"2022","journal-title":"J. Electrochem."},{"key":"ref_15","doi-asserted-by":"crossref","first-page":"115477","DOI":"10.1016\/j.microrel.2024.115477","article-title":"Thermo-Mechanical Reliability of Glass Substrate and Through Glass Vias (TGV): A Comprehensive Review","volume":"161","author":"Lai","year":"2024","journal-title":"Microelectron. Reliab."},{"key":"ref_16","doi-asserted-by":"crossref","first-page":"164","DOI":"10.37665\/ppEPNKH55728","article-title":"Conductive Cu Paste as a Via Filling Material for Through Glass Via (TGV)","volume":"Volume 28","author":"Ejiri","year":"2025","journal-title":"Proceedings of the Pan Pacific Symposium"},{"key":"ref_17","doi-asserted-by":"crossref","first-page":"109106","DOI":"10.1016\/j.optlaseng.2025.109106","article-title":"Fabrication and Analysis of Through-Glass Vias for Glass-Based Electronic Packaging Using an Ultrashort Pulsed Laser","volume":"193","author":"Franz","year":"2025","journal-title":"Opt. Lasers Eng."},{"key":"ref_18","first-page":"19","article-title":"Rapid and High Throughput Formation of Through Glass Vias","volume":"Volume 12872","author":"Schrauben","year":"2024","journal-title":"Proceedings of Laser Applications in Microelectronic and Optoelectronic Manufacturing (LAMOM) XXIX"},{"key":"ref_19","doi-asserted-by":"crossref","first-page":"282","DOI":"10.1007\/s00339-023-06526-z","article-title":"Rapid and Complex Dynamics of Through Glass Via Formation Using a Picosecond Quasi-Continuous Wave Laser as Revealed by Time-Resolved Absorptance Measurements and Multiphase Modeling","volume":"129","author":"Schrauben","year":"2023","journal-title":"Appl. Phys. A"},{"key":"ref_20","doi-asserted-by":"crossref","first-page":"269","DOI":"10.1007\/s00339-022-05404-4","article-title":"Rapid Formation of High Aspect Ratio Through Holes in Thin Glass Substrates Using an Engineered, QCW Laser Approach","volume":"128","author":"Matsumoto","year":"2022","journal-title":"Appl. Phys. A"},{"key":"ref_21","doi-asserted-by":"crossref","unstructured":"Kim, J., Kim, S., Kim, B., Choi, J., and Ahn, S. (2023). Study of Through Glass Via (TGV) Using Bessel Beam, Ultrashort Two-Pulses of Laser and Selective Chemical Etching. Micromachines, 14.","DOI":"10.2139\/ssrn.4460327"},{"key":"ref_22","doi-asserted-by":"crossref","first-page":"16481","DOI":"10.1007\/s10854-021-06205-w","article-title":"Investigation of Low-Cost Through Glass Vias Formation on Borosilicate Glass by Picosecond Laser-Induced Selective Etching","volume":"32","author":"Chen","year":"2021","journal-title":"J. Mater. Sci. Mater. Electron."},{"key":"ref_23","doi-asserted-by":"crossref","first-page":"1105","DOI":"10.1002\/sdtp.18369","article-title":"81-1: Preparation Process of Through Glass Via Based on Laser Induced Deep Etching","volume":"Volume 56","author":"Xing","year":"2025","journal-title":"Proceedings of the SID Symposium Digest of Technical Papers"},{"key":"ref_24","doi-asserted-by":"crossref","first-page":"395","DOI":"10.1016\/j.sna.2006.06.044","article-title":"Strategies in Deep Wet Etching of Pyrex Glass","volume":"133","author":"Iliescu","year":"2007","journal-title":"Sens. Actuators A Phys."},{"key":"ref_25","first-page":"52","article-title":"Formation and Metallization Process Study on High Aspect Ratio Through-Glass-Via (TGV) within Photosensitive Glass","volume":"38","author":"Lin","year":"2018","journal-title":"Trans. Beijing Inst. Technol."},{"key":"ref_26","first-page":"1","article-title":"Recent Through-Glass Via (TGV) Formation Technologies for AI Semiconductor Packaging","volume":"32","author":"Lim","year":"2025","journal-title":"J. Microelectron. Packag. Soc."},{"key":"ref_27","doi-asserted-by":"crossref","first-page":"110283","DOI":"10.1016\/j.mssp.2025.110283","article-title":"Atomic Layer Deposition of TiO2\/TiN\/Ru\/Cu Multi-Layer on the Glass Surface for Glass\u2013Metal Adhesion Enhancement","volume":"204","author":"Chen","year":"2026","journal-title":"Mater. Sci. Semicond. Process."},{"key":"ref_28","doi-asserted-by":"crossref","first-page":"106371","DOI":"10.1016\/j.mejo.2024.106371","article-title":"Electroless Silver Plating on Through-Glass Via (TGV) as an Adhesive and Conducting Layer","volume":"152","author":"Huang","year":"2024","journal-title":"Microelectron. J."},{"key":"ref_29","doi-asserted-by":"crossref","first-page":"503","DOI":"10.4139\/sfj.72.503","article-title":"Copper Plating on Through Glass Via (TGV) Using Both High-Speed Sputtering Process and Wet Process","volume":"72","author":"Inoue","year":"2021","journal-title":"J. Surf. Finish. Soc. Jpn."},{"key":"ref_30","doi-asserted-by":"crossref","first-page":"140825","DOI":"10.1016\/j.tsf.2025.140825","article-title":"Electroless Cu Plating on Glass Substrates via Repeated Sn-Sensitization and Pd-Activation Cycles without Adhesion Promoter Layers","volume":"832","author":"Nakao","year":"2025","journal-title":"Thin Solid Films"},{"key":"ref_31","doi-asserted-by":"crossref","first-page":"1109","DOI":"10.1002\/sdtp.18370","article-title":"81-2: Effect of Electroplating Additives on Copper Protrusion of Metallized Through-Glass Vias (TGVs)","volume":"Volume 56","author":"An","year":"2025","journal-title":"Proceedings of the SID Symposium Digest of Technical Papers"},{"key":"ref_32","doi-asserted-by":"crossref","first-page":"106823","DOI":"10.1016\/j.elecom.2020.106823","article-title":"Defect-Free Metallization of Through-Glass Vias with Engineered Geometry in Additive-Free Electrolyte","volume":"119","author":"Jayaraman","year":"2020","journal-title":"Electrochem. Commun."},{"key":"ref_33","doi-asserted-by":"crossref","first-page":"1008","DOI":"10.1016\/j.jmrt.2024.06.137","article-title":"Through Glass Via (TGV) Copper Metallization and Its Microstructure Modification","volume":"31","author":"Chang","year":"2024","journal-title":"J. Mater. Res. Technol."},{"key":"ref_34","doi-asserted-by":"crossref","first-page":"230","DOI":"10.4071\/001c.147205","article-title":"Pulse Reverse Electroplating for Copper Filling in High Aspect Ratio Through Glass Vias for Advanced Packaging","volume":"2025","author":"Fiedler","year":"2025","journal-title":"IMAPSource Proc."},{"key":"ref_35","doi-asserted-by":"crossref","first-page":"182619","DOI":"10.1016\/j.jallcom.2025.182619","article-title":"Advanced Through-Glass Via (TGV) Electro-Filling and Solder Bumping for Miniaturized 3D MEMS Packaging","volume":"1038","author":"Jung","year":"2025","journal-title":"J. Alloys Compd."},{"key":"ref_36","first-page":"37","article-title":"Recent Research Trends in TGV and Cu-Filling for AI Semiconductor Packaging","volume":"31","author":"Shin","year":"2024","journal-title":"J. Microelectron. Packag. Soc."},{"key":"ref_37","doi-asserted-by":"crossref","first-page":"114487","DOI":"10.1016\/j.microrel.2022.114487","article-title":"In-Situ Temperature-Dependent Characterization of Copper Through Glass Via (TGV)","volume":"129","author":"Pan","year":"2022","journal-title":"Microelectron. Reliab."},{"key":"ref_38","doi-asserted-by":"crossref","first-page":"52","DOI":"10.1038\/s41378-026-01162-y","article-title":"Time and Temperature Dependence of Residual Stress Evolution and Protrusion Behavior in Through-Glass Vias","volume":"12","author":"Wang","year":"2026","journal-title":"Microsyst. Nanoeng."},{"key":"ref_39","doi-asserted-by":"crossref","first-page":"46","DOI":"10.1038\/s41378-026-01160-0","article-title":"Long-Term High-Temperature Aging Mechanism of Copper-Metallized Through-Glass Vias: A Combined Nanoindentation Test and Hybrid Potts-Phase Field Simulation Study","volume":"12","author":"Chen","year":"2026","journal-title":"Microsyst. Nanoeng."},{"key":"ref_40","doi-asserted-by":"crossref","first-page":"181522","DOI":"10.1016\/j.jallcom.2025.181522","article-title":"The Influence of Heat Treatment Process on Electroplated Metallized Through Glass Vias (TGV) Substrates","volume":"1035","author":"Wang","year":"2025","journal-title":"J. Alloys Compd."},{"key":"ref_41","doi-asserted-by":"crossref","first-page":"12669","DOI":"10.1007\/s10854-018-9384-6","article-title":"Reliability of Fine-Pitch Through-Vias in Glass Interposers and Packages for High-Bandwidth Computing and Communications","volume":"29","author":"Demir","year":"2018","journal-title":"J. Mater. Sci. Mater. Electron."},{"key":"ref_42","doi-asserted-by":"crossref","unstructured":"Pan, K., Xu, J., Lai, Y., Park, S., Okoro, C., Joshi, D., and Pollard, S. (July, January 1). Investigation of Copper and Glass Interaction in Through Glass Via (TGV) during Thermal Cycling. Proceedings of the 2021 IEEE 71st Electronic Components and Technology Conference (ECTC), San Diego, CA, USA.","DOI":"10.1109\/ECTC32696.2021.00263"},{"key":"ref_43","doi-asserted-by":"crossref","unstructured":"Zhao, J., Chen, Z., Qin, F., and Yu, D. (2022). Thermo-Mechanical Reliability Study of Through Glass Vias in 3D Interconnection. Micromachines, 13.","DOI":"10.3390\/mi13101799"},{"key":"ref_44","doi-asserted-by":"crossref","first-page":"3027","DOI":"10.1007\/s12206-024-0522-1","article-title":"A Comprehensive Numerical Analysis for Preventing Cracks in 2.5D Glass Interposer","volume":"38","author":"Le","year":"2024","journal-title":"J. Mech. Sci. Technol."},{"key":"ref_45","doi-asserted-by":"crossref","first-page":"2","DOI":"10.37665\/f3z77681","article-title":"Cu Conductive Pastes as Via Filling Materials for Various Substrates","volume":"38","author":"Ejiri","year":"2025","journal-title":"J. Surf. Mt. Technol."}],"container-title":["Micromachines"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.mdpi.com\/2072-666X\/17\/6\/720\/pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,6,18]],"date-time":"2026-06-18T06:04:37Z","timestamp":1781762677000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.mdpi.com\/2072-666X\/17\/6\/720"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,6,14]]},"references-count":45,"journal-issue":{"issue":"6","published-online":{"date-parts":[[2026,6]]}},"alternative-id":["mi17060720"],"URL":"https:\/\/doi.org\/10.3390\/mi17060720","relation":{},"ISSN":["2072-666X"],"issn-type":[{"value":"2072-666X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2026,6,14]]}}}