{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,8,31]],"date-time":"2026-08-31T05:19:22Z","timestamp":1788153562159,"version":"build-2803163510"},"reference-count":81,"publisher":"MDPI AG","issue":"9","license":[{"start":{"date-parts":[[2026,8,29]],"date-time":"2026-08-29T00:00:00Z","timestamp":1787961600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"funder":[{"name":"SK hynix Inc."}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Micromachines"],"abstract":"<jats:p>Resistive random-access memory (RRAM) has emerged as one of the most promising device platforms for neuromorphic, in-memory computing because its two-terminal metal\u2013insulator\u2013metal (MIM) structure can reproduce the weight-update behavior of biological synapses while remaining compatible with mainstream CMOS processing. This review summarizes the current state of RRAM-based neuromorphic technology from four complementary perspectives: device physics, materials, fabrication processes, and packaging. We first describe the operating principles of filamentary and interface-type RRAM, including the forming\/set\/reset switching sequence, and the two dominant analytical frameworks used to describe the reset transition\u2014the ion-migration model and the thermally driven filament-dissolution model. We then review the switching-layer and electrode materials that have been most widely investigated such as HfOx, TiOx, TaOx, ZnO, ZrO2, and Cu\/Ag-based conductive-bridge systems, together with representative bilayer and doped architectures reported for synaptic devices. The biological functions that RRAM can emulate are discussed alongside the non-ideal characteristics that currently limit on-chip training accuracy, with emphasis on separating device-to-device from cycle-to-cycle variability and on the workload-dependent nature of endurance and retention requirements. We further summarize the process technologies used to integrate RRAM into large-scale, CMOS-compatible arrays, including atomic layer deposition, interfacial oxygen-reservoir engineering, low-thermal-budget back-end-of-line integration, and three-dimensional vertical RRAM patterning, and discuss the advanced packaging strategies such as 2.5D\/3D heterogeneous integration, chiplet architectures, thermal-interface materials, and nanostructured underfills required to manage the power density and interconnect demands of large synaptic arrays, distinguishing solutions that have been demonstrated specifically for RRAM neuromorphic arrays from those that remain general advanced-packaging concepts. Finally, RRAM is benchmarked against competing emerging non-volatile memories, and the key research directions such as three-terminal memtransistor architectures, three-dimensional integration with high-performance selectors, and hardware\u2013algorithm co-design that will determine whether RRAM-based neuromorphic hardware can move from laboratory demonstrations to on-device AI, autonomous systems, and large-scale artificial-neural-network accelerators are outlined. Relative to prior reviews that focus primarily on RRAM device physics or on switching-layer materials in isolation, the distinctive contribution of this review is an explicit, cross-layer synthesis that connects device-level non-idealities to their consequences for wafer-scale process integration and for advanced 2.5D\/3D packaging\u2014a combination that, to our knowledge, has not been jointly treated in the recent review literature on RRAM-based neuromorphic hardware.<\/jats:p>","DOI":"10.3390\/mi17091032","type":"journal-article","created":{"date-parts":[[2026,8,31]],"date-time":"2026-08-31T02:08:58Z","timestamp":1788142138000},"page":"1032","update-policy":"https:\/\/doi.org\/10.3390\/mdpi_crossmark_policy","source":"Crossref","is-referenced-by-count":0,"title":["RRAM-Based Neuromorphic Devices for Artificial-Intelligence Hardware: Device Physics, Materials, Processing, and Packaging"],"prefix":"10.3390","volume":"17","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-4895-356X","authenticated-orcid":false,"given":"Sung Gyu","family":"Pyo","sequence":"first","affiliation":[{"name":"School of Integrative Engineering, Chung-Ang University, 84 Heukseok-ro, Dongjak-gu, Seoul 06974, Republic of Korea"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"1968","published-online":{"date-parts":[[2026,8,29]]},"reference":[{"key":"ref_1","doi-asserted-by":"crossref","first-page":"S547","DOI":"10.1016\/j.ceramint.2017.05.289","article-title":"Metal oxide resistive switching memory: Materials, properties and switching mechanisms","volume":"43","author":"Kumar","year":"2017","journal-title":"Ceram. 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