{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,9,22]],"date-time":"2026-09-22T05:02:45Z","timestamp":1790053365882,"version":"4.0.1"},"reference-count":16,"publisher":"MDPI AG","issue":"9","license":[{"start":{"date-parts":[[2026,9,16]],"date-time":"2026-09-16T00:00:00Z","timestamp":1789516800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"funder":[{"name":"National Key Research and Development Program of China","award":["2021YFA0717700"],"award-info":[{"award-number":["2021YFA0717700"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Micromachines"],"abstract":"<jats:p>Photonic computing systems require large numbers of accurate programmable voltages for photonic weight programming and device bias control. This paper presents a 128-channel digital-to-analog converter (DAC) implemented in a 250 nm BCD high-voltage CMOS process. A code-dependent per-channel auxiliary-DAC calibration scheme is proposed to compensate main-DAC conversion errors and channel-dependent offsets. In addition, a separated low-\/high-voltage-domain driver and a stepwise multichannel update scheme are adopted to reduce static power and suppress update-induced disturbances. After calibration, the measured maximum absolute differential non-linearity (DNL) and integral non-linearity (INL) are 0.26 least significant bit (LSB) and 0.39 LSB, respectively, and the maximum deviation of voltage output (DVO) across 128 channels is 0.71 LSB. The DAC achieves rising\/falling slew rates of 6.1\/11.7 V\/\u03bcs under an 8 V output swing. Under dynamic operation with 0.2 to 8.2 V sinusoidal outputs and a 10 k\u03a9 load per channel, the total power consumption is 0.85 W. Thermo-optic phase-shifter measurements further verify programmable photonic phase tuning, demonstrating a scalable electrical control interface for thermo-optic phase-shifter-based photonic computing hardware.<\/jats:p>","DOI":"10.3390\/mi17091088","type":"journal-article","created":{"date-parts":[[2026,9,16]],"date-time":"2026-09-16T13:50:27Z","timestamp":1789566627000},"page":"1088","update-policy":"https:\/\/doi.org\/10.3390\/mdpi_crossmark_policy","source":"Crossref","is-referenced-by-count":0,"title":["A 128-Channel 0.2\u20138.2 V Calibrated DAC IC Achieving 0.26-LSB DNL and 0.71-LSB DVO for Photonic Computing"],"prefix":"10.3390","volume":"17","author":[{"ORCID":"https:\/\/orcid.org\/0009-0009-5251-3645","authenticated-orcid":false,"given":"Likai","family":"Li","sequence":"first","affiliation":[{"name":"School of Electronic Science and Engineering, Nanjing University, Nanjing 210023, China"}],"role":[{"vocabulary":"crossref","role":"author"},{"role":"conceptualization","vocabulary":"credit"},{"role":"methodology","vocabulary":"credit"},{"role":"software","vocabulary":"credit"},{"role":"validation","vocabulary":"credit"},{"role":"formal-analysis","vocabulary":"credit"},{"role":"investigation","vocabulary":"credit"},{"role":"data-curation","vocabulary":"credit"},{"role":"writing-original-draft","vocabulary":"credit"},{"role":"visualization","vocabulary":"credit"}]},{"given":"Desong","family":"Lv","sequence":"additional","affiliation":[{"name":"School of Electronic Science and Engineering, Nanjing University, Nanjing 210023, China"}],"role":[{"vocabulary":"crossref","role":"author"},{"role":"software","vocabulary":"credit"},{"role":"validation","vocabulary":"credit"},{"role":"data-curation","vocabulary":"credit"},{"role":"formal-analysis","vocabulary":"credit"},{"role":"writing-review-editing","vocabulary":"credit"}]},{"given":"Jingjing","family":"Lv","sequence":"additional","affiliation":[{"name":"School of Microelectronics, Nantong University, Nantong 226019, China"}],"role":[{"vocabulary":"crossref","role":"author"},{"role":"methodology","vocabulary":"credit"},{"role":"writing-review-editing","vocabulary":"credit"},{"role":"supervision","vocabulary":"credit"}]},{"given":"Dawei","family":"Li","sequence":"additional","affiliation":[{"name":"School of Integrated Circuits, Wuhan University of Technology, Wuhan 430070, China"}],"role":[{"vocabulary":"crossref","role":"author"},{"role":"writing-review-editing","vocabulary":"credit"},{"role":"supervision","vocabulary":"credit"},{"role":"resources","vocabulary":"credit"}]},{"given":"Li","family":"Du","sequence":"additional","affiliation":[{"name":"School of Electronic Science and Engineering, Nanjing University, Nanjing 210023, China"},{"name":"Interdisciplinary Research Center for Future Intelligent Chips (Chip-X), Nanjing University, Suzhou 215163, China"}],"role":[{"vocabulary":"crossref","role":"author"},{"role":"conceptualization","vocabulary":"credit"},{"role":"resources","vocabulary":"credit"},{"role":"writing-review-editing","vocabulary":"credit"},{"role":"supervision","vocabulary":"credit"},{"role":"project-administration","vocabulary":"credit"},{"role":"funding-acquisition","vocabulary":"credit"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5316-619X","authenticated-orcid":false,"given":"Yuan","family":"Du","sequence":"additional","affiliation":[{"name":"School of Electronic Science and Engineering, Nanjing University, Nanjing 210023, China"},{"name":"Interdisciplinary Research Center for Future Intelligent Chips (Chip-X), Nanjing University, Suzhou 215163, China"}],"role":[{"vocabulary":"crossref","role":"author"},{"role":"conceptualization","vocabulary":"credit"},{"role":"methodology","vocabulary":"credit"},{"role":"resources","vocabulary":"credit"},{"role":"supervision","vocabulary":"credit"},{"role":"project-administration","vocabulary":"credit"},{"role":"funding-acquisition","vocabulary":"credit"},{"role":"writing-review-editing","vocabulary":"credit"}]}],"member":"1968","published-online":{"date-parts":[[2026,9,16]]},"reference":[{"key":"ref_1","doi-asserted-by":"crossref","first-page":"090901","DOI":"10.1063\/1.5108912","article-title":"Novel frontier of photonics for data processing\u2014Photonic accelerator","volume":"4","author":"Kitayama","year":"2019","journal-title":"APL Photonics"},{"key":"ref_2","doi-asserted-by":"crossref","first-page":"144","DOI":"10.1038\/530144a","article-title":"The chips are down for Moore\u2019s law","volume":"530","author":"Waldrop","year":"2016","journal-title":"Nature"},{"key":"ref_3","doi-asserted-by":"crossref","first-page":"367","DOI":"10.1038\/s41566-021-00796-w","article-title":"Large-scale neuromorphic optoelectronic computing with a reconfigurable diffractive processing unit","volume":"15","author":"Zhou","year":"2021","journal-title":"Nat. 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Photonics"},{"key":"ref_7","doi-asserted-by":"crossref","first-page":"441","DOI":"10.1038\/nphoton.2017.93","article-title":"Deep learning with coherent nanophotonic circuits","volume":"11","author":"Shen","year":"2017","journal-title":"Nat. Photonics"},{"key":"ref_8","doi-asserted-by":"crossref","first-page":"52","DOI":"10.1038\/s41586-020-03070-1","article-title":"Parallel convolutional processing using an integrated photonic tensor core","volume":"589","author":"Feldmann","year":"2021","journal-title":"Nature"},{"key":"ref_9","unstructured":"Analog Devices (2026, July 29). AD5371: 40-Channel, 14-Bit, Serial Input, Voltage-Output DAC. Data Sheet. Available online: https:\/\/www.analog.com\/media\/en\/technical-documentation\/data-sheets\/AD5371.pdf."},{"key":"ref_10","unstructured":"Analog Devices (2026, July 29). AD5372\/AD5373: 32-Channel, 16-Bit\/14-Bit, Serial Input, Voltage-Output DACs. Data Sheet. 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