{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,2]],"date-time":"2025-11-02T10:15:58Z","timestamp":1762078558065,"version":"build-2065373602"},"reference-count":29,"publisher":"MDPI AG","issue":"4","license":[{"start":{"date-parts":[[2022,12,7]],"date-time":"2022-12-07T00:00:00Z","timestamp":1670371200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"funder":[{"DOI":"10.13039\/501100001871","name":"FCT\u2014Funda\u00e7\u00e3o para a Ci\u00eancia e a Tecnologia","doi-asserted-by":"publisher","award":["SFRH\/BD\/137519\/2018","UIDB\/50025\/2020-2023","SMART-E-PTDC\/CTM-PAM\/04012\/2022","IDS-PAPER-PTDC\/CTM-PAM\/4241\/2020","UIDB\/00066\/2020","716510 (ERC-2016-StG TREND)","952169 (SYNERGY, H2020-WIDESPREAD-2020-5, CSA)"],"award-info":[{"award-number":["SFRH\/BD\/137519\/2018","UIDB\/50025\/2020-2023","SMART-E-PTDC\/CTM-PAM\/04012\/2022","IDS-PAPER-PTDC\/CTM-PAM\/4241\/2020","UIDB\/00066\/2020","716510 (ERC-2016-StG TREND)","952169 (SYNERGY, H2020-WIDESPREAD-2020-5, CSA)"]}],"id":[{"id":"10.13039\/501100001871","id-type":"DOI","asserted-by":"publisher"}]},{"name":"PEST (CTS\/UNINOVA)","award":["SFRH\/BD\/137519\/2018","UIDB\/50025\/2020-2023","SMART-E-PTDC\/CTM-PAM\/04012\/2022","IDS-PAPER-PTDC\/CTM-PAM\/4241\/2020","UIDB\/00066\/2020","716510 (ERC-2016-StG TREND)","952169 (SYNERGY, H2020-WIDESPREAD-2020-5, CSA)"],"award-info":[{"award-number":["SFRH\/BD\/137519\/2018","UIDB\/50025\/2020-2023","SMART-E-PTDC\/CTM-PAM\/04012\/2022","IDS-PAPER-PTDC\/CTM-PAM\/4241\/2020","UIDB\/00066\/2020","716510 (ERC-2016-StG TREND)","952169 (SYNERGY, H2020-WIDESPREAD-2020-5, CSA)"]}]},{"name":"European Community\u2019s H2020 program","award":["SFRH\/BD\/137519\/2018","UIDB\/50025\/2020-2023","SMART-E-PTDC\/CTM-PAM\/04012\/2022","IDS-PAPER-PTDC\/CTM-PAM\/4241\/2020","UIDB\/00066\/2020","716510 (ERC-2016-StG TREND)","952169 (SYNERGY, H2020-WIDESPREAD-2020-5, CSA)"],"award-info":[{"award-number":["SFRH\/BD\/137519\/2018","UIDB\/50025\/2020-2023","SMART-E-PTDC\/CTM-PAM\/04012\/2022","IDS-PAPER-PTDC\/CTM-PAM\/4241\/2020","UIDB\/00066\/2020","716510 (ERC-2016-StG TREND)","952169 (SYNERGY, H2020-WIDESPREAD-2020-5, CSA)"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["JLPEA"],"abstract":"<jats:p>In this paper, the most suited analog-to-digital (A\/D) converters (ADCs) for Internet of Things (IoT) applications are compared in terms of complexity, dynamic performance, and energy efficiency. Among them, an innovative hybrid topology, a digital\u2013delta (\u0394) modulator (\u0394M) ADC employing noise shaping (NS), is proposed. To implement the active building blocks, several standard-cell-based synthesizable comparators and amplifiers are examined and compared in terms of their key performance parameters. The simulation results of a fully synthesizable Digital-\u0394M with NS using passive and standard-cell-based circuitry show a peak of 72.5 dB in the signal-to-noise and distortion ratio (SNDR) for a 113 kHz input signal and 1 MHz bandwidth (BW). The estimated FoMWalden is close to 16.2 fJ\/conv.-step.<\/jats:p>","DOI":"10.3390\/jlpea12040064","type":"journal-article","created":{"date-parts":[[2022,12,8]],"date-time":"2022-12-08T02:51:56Z","timestamp":1670467916000},"page":"64","update-policy":"https:\/\/doi.org\/10.3390\/mdpi_crossmark_policy","source":"Crossref","is-referenced-by-count":5,"title":["All-Standard-Cell-Based Analog-to-Digital Architectures Well-Suited for Internet of Things Applications"],"prefix":"10.3390","volume":"12","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-9589-2528","authenticated-orcid":false,"given":"Ana","family":"Correia","sequence":"first","affiliation":[{"name":"CTS\/UNINOVA, Departamento de Engenharia Electrot\u00e9cnica e de Computadores (DEEC), NOVA School of Science and Technology (FCT NOVA), Universidade NOVA de Lisboa, 2829-516 Caparica, Portugal"},{"name":"CENIMAT\/I3N, Departamento de Ci\u00eancia dos Materiais (DCM), and CEMOP\/UNINOVA, NOVA School of Science and Technology (FCT NOVA), Universidade NOVA de Lisboa, 2829-516 Caparica, Portugal"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-7567-0792","authenticated-orcid":false,"given":"V\u00edtor Grade","family":"Tavares","sequence":"additional","affiliation":[{"name":"INESC-TEC and Faculdade de Engenharia da Universidade do Porto (FEUP), Rua Dr. Roberto Frias, 4200-465 Porto, Portugal"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5446-2759","authenticated-orcid":false,"given":"Pedro","family":"Barquinha","sequence":"additional","affiliation":[{"name":"CENIMAT\/I3N, Departamento de Ci\u00eancia dos Materiais (DCM), and CEMOP\/UNINOVA, NOVA School of Science and Technology (FCT NOVA), Universidade NOVA de Lisboa, 2829-516 Caparica, Portugal"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8434-8391","authenticated-orcid":false,"given":"Jo\u00e3o","family":"Goes","sequence":"additional","affiliation":[{"name":"CTS\/UNINOVA, Departamento de Engenharia Electrot\u00e9cnica e de Computadores (DEEC), NOVA School of Science and Technology (FCT NOVA), Universidade NOVA de Lisboa, 2829-516 Caparica, Portugal"}]}],"member":"1968","published-online":{"date-parts":[[2022,12,7]]},"reference":[{"key":"ref_1","unstructured":"O\u2019Riordan, N. (2017). Industrial IoT. Circuits and Systems for the Internet of Things: CAS4IoT, IEEE CAS, River Publishers."},{"key":"ref_2","doi-asserted-by":"crossref","first-page":"129","DOI":"10.1109\/OJSSCS.2021.3118668","article-title":"Recent Advances in High-Resolution Hybrid Discrete-Time Noise-Shaping ADCs","volume":"1","author":"Jiang","year":"2021","journal-title":"IEEE Open J. Solid-State Circuits Soc."},{"key":"ref_3","doi-asserted-by":"crossref","first-page":"2898","DOI":"10.1109\/JSSC.2012.2217874","article-title":"A 90-MS\/s 11-MHz-bandwidth 62-dB SNDR noise-shaping SAR ADC","volume":"47","author":"Fredenburg","year":"2012","journal-title":"IEEE J. Solid-State Circuits"},{"key":"ref_4","doi-asserted-by":"crossref","unstructured":"Schreier, R., and Temes, G.C. (2005). Understanding Delta-Sigma Data Converters, IEEE Press.","DOI":"10.1109\/9780470546772"},{"key":"ref_5","first-page":"1","article-title":"Low-pass delta-delta-sigma ADC","volume":"25","author":"Ren","year":"2014","journal-title":"IEEE Trans. Appl. Supercond."},{"key":"ref_6","doi-asserted-by":"crossref","first-page":"2153","DOI":"10.1109\/TVLSI.2021.3122027","article-title":"An all-standard-cell-based synthesizable SAR ADC with nonlinearity-compensated RDAC","volume":"29","author":"Xu","year":"2021","journal-title":"IEEE Trans. Very Large Scale Integr. Syst."},{"key":"ref_7","doi-asserted-by":"crossref","first-page":"63686","DOI":"10.1109\/ACCESS.2019.2915365","article-title":"A 0.5-V fully synthesizable SAR ADC for on-chip distributed waveform monitors","volume":"7","author":"Park","year":"2019","journal-title":"IEEE Access"},{"key":"ref_8","doi-asserted-by":"crossref","first-page":"70890","DOI":"10.1109\/ACCESS.2020.2986949","article-title":"Fully synthesizable low-area analogue-to-digital converters with minimal design effort based on the dyadic digital pulse modulation","volume":"8","author":"Aiello","year":"2020","journal-title":"IEEE Access"},{"key":"ref_9","unstructured":"Deloraine, E.M., Van Mierlo, S., and Derjavitch, B. (1946). Methode et Syst\u00e9me de Transmission par Impulsions. (932,140), French Patent."},{"key":"ref_10","doi-asserted-by":"crossref","unstructured":"Abate, J.E. (1967). Linear and Adaptive Delta Modulation. [Ph.D. Thesis, Newark College of Enginering].","DOI":"10.1109\/PROC.1967.5486"},{"key":"ref_11","doi-asserted-by":"crossref","unstructured":"Zrilic, D.G. (2005). Circuits and Systems Based on Delta Modulation: Linear, Nonlinear and Mixed Mode Processing, Springer Science & Business Media.","DOI":"10.1007\/b138813"},{"key":"ref_12","unstructured":"Carusone, T., Johns, D., and Martin, K. (2011). Analog Integrated Circuit Design, Wiley. [2nd ed.]."},{"key":"ref_13","doi-asserted-by":"crossref","unstructured":"Razavi, B. (1995). Principles of Data Conversion System Design, IEEE Press.","DOI":"10.1109\/9780470545638"},{"key":"ref_14","doi-asserted-by":"crossref","unstructured":"Rabuske, T., and Fernandes, J. (2017). Charge-Sharing SAR ADCs for Low-Voltage Low-Power Applications, Springer.","DOI":"10.1007\/978-3-319-39624-8"},{"key":"ref_15","doi-asserted-by":"crossref","unstructured":"Guo, W., and Sun, N. (2016, January 12\u201315). A 12b-ENOB 61 \u03bcW noise-shaping SAR ADC with a passive integrator. Proceedings of the ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference, Lausanne, Switzerland.","DOI":"10.1109\/ESSCIRC.2016.7598327"},{"key":"ref_16","doi-asserted-by":"crossref","unstructured":"Li, S., Qiao, B., Gandara, M., and Sun, N. (2018, January 11\u201315). A 13-ENOB 2nd-order noise-shaping SAR ADC realizing optimized NTF zeros using an error-feedback structure. Proceedings of the 2018 IEEE International Solid-State Circuits Conference-(ISSCC), San Francisco, CA, USA.","DOI":"10.1109\/ISSCC.2018.8310270"},{"key":"ref_17","doi-asserted-by":"crossref","first-page":"3412","DOI":"10.1109\/JSSC.2021.3087661","article-title":"A 90-dB-SNDR calibration-free fully passive noise-shaping SAR ADC with 4\u00d7 passive gain and second-order DAC mismatch error shaping","volume":"56","author":"Liu","year":"2021","journal-title":"IEEE J. Solid-State Circuits"},{"key":"ref_18","doi-asserted-by":"crossref","unstructured":"Correia, A., Barquinha, P., Marques, J., and Goes, J. (2018, January 2\u20135). A High-resolution \u0394-Modulator ADC with Oversampling and Noise-shaping for IoT. Proceedings of the 2018 14th Conference on Ph. D. Research in Microelectronics and Electronics (PRIME), Prague, Czech Republic.","DOI":"10.1109\/PRIME.2018.8430338"},{"key":"ref_19","doi-asserted-by":"crossref","first-page":"84","DOI":"10.1109\/TCSI.2013.2268571","article-title":"Digitally synthesized stochastic flash ADC using only standard digital cells","volume":"61","author":"Weaver","year":"2013","journal-title":"IEEE Trans. Circuits Syst. I Regul. Pap."},{"key":"ref_20","doi-asserted-by":"crossref","unstructured":"Aiello, O., Crovetti, P., and Alioto, M. (2018, January 27\u201330). Fully synthesizable, rail-to-rail dynamic voltage comparator for operation down to 0.3 V. Proceedings of the 2018 IEEE International Symposium on Circuits and Systems (ISCAS), Florence, Italy.","DOI":"10.1109\/ISCAS.2018.8351106"},{"key":"ref_21","doi-asserted-by":"crossref","unstructured":"Ojima, N., Xu, Z., and Iizuka, T. (2019, January 23\u201326). A 0.0053-mm2 6-bit fully-standard-cell-based synthesizable SAR ADC in 65 nm CMOS. Proceedings of the 2019 17th IEEE International New Circuits and Systems Conference (NEWCAS), Munich, Germany.","DOI":"10.1109\/NEWCAS44328.2019.8961218"},{"key":"ref_22","first-page":"2675","article-title":"Rail-to-rail dynamic voltage comparator scalable down to pW-range power and 0.15-V supply","volume":"68","author":"Aiello","year":"2021","journal-title":"IEEE Trans. Circuits Syst. II Express Briefs"},{"key":"ref_23","doi-asserted-by":"crossref","first-page":"351","DOI":"10.1007\/s10470-020-01682-1","article-title":"A 0.35 V-to-1.0 V synthesizable rail-to-rail dynamic voltage comparator based OAI&AOI logic","volume":"104","author":"Li","year":"2020","journal-title":"Analog. Integr. Circuits Signal Process."},{"key":"ref_24","doi-asserted-by":"crossref","first-page":"1605","DOI":"10.1109\/JSSC.2013.2253232","article-title":"A 15-bit 140-\u03bcW Scalable-Bandwidth Inverter-Based \u0394\u03a3 Modulator for a MEMS Microphone With Digital Output","volume":"48","author":"Christen","year":"2013","journal-title":"IEEE J. Solid-State Circuits"},{"key":"ref_25","doi-asserted-by":"crossref","unstructured":"Ki, W.H., and Temes, G.C. (1990, January 1\u20133). Offset-compensated switched-capacitor integrators. Proceedings of the IEEE International Symposium on Circuits and Systems, New Orleans, LA, USA.","DOI":"10.1109\/ISCAS.1991.176675"},{"key":"ref_26","doi-asserted-by":"crossref","first-page":"1103","DOI":"10.1049\/el:19860756","article-title":"Switched-capacitor integrator with reduced sensitivity to amplifier gain","volume":"21","author":"Nagaraj","year":"1986","journal-title":"Electron. Lett."},{"key":"ref_27","doi-asserted-by":"crossref","first-page":"458","DOI":"10.1109\/JSSC.2008.2010973","article-title":"Low voltage, low power, inverter-based switched-capacitor delta-sigma modulator","volume":"44","author":"Chae","year":"2009","journal-title":"IEEE J. Solid-State Circuits"},{"key":"ref_28","doi-asserted-by":"crossref","unstructured":"Correia, A., Tavares, V.G., Barquinha, P., and Goes, J. (2021, January 24\u201326). Trade-offs and Limitations in Energy-Efficient Inverter-based CMOS Amplifiers. Proceedings of the XXXVI Conference on Design of Circuits and Integrated Systems (DCIS), Vila do Conde, Portugal.","DOI":"10.1109\/DCIS53048.2021.9666176"},{"key":"ref_29","doi-asserted-by":"crossref","unstructured":"Neofytou, M., Zhou, M., Bolatkale, M., Liu, Q., Zhang, C., Radulov, G., Baltus, P., and Breems, L. (2018, January 27\u201330). A 1.9 mW 250 MHz Bandwidth Continuous-Time \u03a3\u0394 Modulator for Ultra-Wideband Applications. Proceedings of the 2018 IEEE International Symposium on Circuits and Systems (ISCAS), Florence, Italy.","DOI":"10.1109\/ISCAS.2018.8351046"}],"container-title":["Journal of Low Power Electronics and Applications"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.mdpi.com\/2079-9268\/12\/4\/64\/pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,10,11]],"date-time":"2025-10-11T01:36:01Z","timestamp":1760146561000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.mdpi.com\/2079-9268\/12\/4\/64"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,12,7]]},"references-count":29,"journal-issue":{"issue":"4","published-online":{"date-parts":[[2022,12]]}},"alternative-id":["jlpea12040064"],"URL":"https:\/\/doi.org\/10.3390\/jlpea12040064","relation":{},"ISSN":["2079-9268"],"issn-type":[{"type":"electronic","value":"2079-9268"}],"subject":[],"published":{"date-parts":[[2022,12,7]]}}}