{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,2]],"date-time":"2022-04-02T04:56:54Z","timestamp":1648875414202},"reference-count":44,"publisher":"IGI Global","issue":"4","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013,10]]},"abstract":"<jats:p>Embedded devices are ubiquitously involved in a large variety of security applications which heavily rely on the computation of hash functions. Roughly, two alternatives for speeding up computations co-exist in these resource constrained devices: parallel processing and hardware acceleration. Needles to say, multi-core devices are clearly the next step in embedded systems due to clear technological limitations on single processor frequency. Hardware accelerators are long known to be a cheaper approach for costly cryptographic functions. The authors analysis is focused on the five SHA-3 finalists which are also contrasted to the previous SHA-2 standard and to the widespread MD5. On the hardware side, the authors deploy their implementations on two platforms from Freescale: a S12X core equipped with an XGATE coprocessor and a Kinetis K60 core equipped with a crypto co-processor. These platforms differ significantly in terms of computational power, the first is based on a 16-bit Freescale proprietary architecture while the former relies on a more recent 32-bit Cortex core. The authors\u2019 experimental results show mixed performances between the old standard and the new candidates. Some of the new candidates clearly outperform the old standard in terms of both computational speed and memory requirements while others do not. Bottom line, on the 16 bit platform BLAKE and Gr\u00f8stl are the top performers while on the 32-bit platform Keccak, Blake and Skein give the best results.<\/jats:p>","DOI":"10.4018\/ijsse.2013100101","type":"journal-article","created":{"date-parts":[[2014,2,25]],"date-time":"2014-02-25T13:13:06Z","timestamp":1393333986000},"page":"1-24","source":"Crossref","is-referenced-by-count":1,"title":["Performance Evaluation of SHA-2 Standard vs. SHA-3 Finalists on Two Freescale Platforms"],"prefix":"10.4018","volume":"4","author":[{"given":"Pal-Stefan","family":"Murvay","sequence":"first","affiliation":[{"name":"Politehnica University of Timisoara, Timisoara, Romania"}]},{"given":"Bogdan","family":"Groza","sequence":"additional","affiliation":[{"name":"Politehnica University of Timisoara, Timisoara, Romania"}]}],"member":"2432","reference":[{"key":"ijsse.2013100101-0","unstructured":"Aoki, K., Roland, G., Sasaki, Y., & Schl\u00e4ffer, M. (2011). Byte SLICING Gr\u00f8stl - Optimized intel AES-NI and 8-bit implementations of the SHA-3 Finalist Gr\u00f8stl. In Proceedings of The Sixth International Conference on Security and Cryptography (SECRYPT 2011). SciTePress."},{"key":"ijsse.2013100101-1","unstructured":"Aumasson, J.-P., Henzen, L., Meier, W., & Phan, R. C.-W. (2010). SHA-3 proposal BLAKE. Submission to NIST (Round 3)."},{"key":"ijsse.2013100101-2","unstructured":"Aumasson, J.-P., Neves, S., Wilcox-O\u2019Hearn, Z., & Winnerlein, C. (2012). Blake2: Simpler, smaller, fast as MD5. Retrieved December 29, 2012, from https:\/\/blake2.net\/blake2 20121223.pdf"},{"key":"ijsse.2013100101-3","unstructured":"Balasch, J., Ege, B., Eisenbarth, T., G\u00e9rard, B., Gong, Z., G\u00fcneysu, T., ... von Maurich, I. (2012). Compact implementation and performance evaluation of hash functions in attiny devices. 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MC9S12XDP512 data sheet, Rev. 2.21. Retrieved March 15, 2013, from http:\/\/cache.freescale.com\/files\/microcontrollers\/doc\/data_sheet\/MC9S12XDP512RMV2.pdf"},{"key":"ijsse.2013100101-12","unstructured":"Freescale. (2011, November). K60 sub-family reference manual, Rev. 6. Retrieved March 15, 2013, from http:\/\/cache.freescale.com\/files\/32bit\/doc\/ref_manual\/K60P144M100SF2RM.pdf?fpsp=1&WT_TYPE=Reference%20Manuals&WT_VENDOR=FREESCALE&WT_FILE_FORMAT=pdf&WT_ASSET=Documentation"},{"key":"ijsse.2013100101-13","unstructured":"Gauravaram, P., Knudsen, L. R.., Matusiewicz, K., Mendel, F., Rechberger, C., Schlffer, M., & Thomsen, S. S. (2011). Gr\u00f8stl \u2013 a SHA-3 candidate. Submission to NIST (Round 3)."},{"key":"ijsse.2013100101-14","unstructured":"Gligoroski, D., Knapskog, S. J., Amundsen, J., & Jensen, R. E. (2011). Internationally standardized efficient cryptographic hash function. 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Compact FPGA implementations of the five SHA-3 finalists. In Proceedings of the Smart Card Research and Advanced Applications (pp. 217\u2013233).","DOI":"10.1007\/978-3-642-27257-8_14"},{"key":"ijsse.2013100101-24","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-28428-1"},{"key":"ijsse.2013100101-25","unstructured":"Macchetti, M., & Rivard, P. (2005, July 14-15). Small-scale variants of the secure hash standard. In Proceedings of the ECRYPT Workshop on RFID and Lightweight Cryptography, Graz, Austria."},{"key":"ijsse.2013100101-26","unstructured":"Mitchell, R. (2006, March). Tutorial: Introducing the XGATE module to consumer and industrial application developers. Retrieved March 15, 2013, from http:\/\/cache.freescale.com\/files\/microcontrollers\/doc\/app_note\/AN3224.pdf, Freescale"},{"key":"ijsse.2013100101-27","doi-asserted-by":"crossref","unstructured":"Murvay, P., & Groza, B. (2011). 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In Proceedigns of the Advances in Cryptology \u2013 (EUROCRYPT 2005) (Vol. 3494 of LNCS, pp. 561\u2013561). Springer Berlin \/ Heidelberg.","DOI":"10.1007\/11426639_2"},{"key":"ijsse.2013100101-40","doi-asserted-by":"crossref","unstructured":"Wenzel-Benner, C., & Gr\u00e4f, J. (2010). XBX: eXternal benchmarking eXtension for the SUPERCOP crypto benchmarking framework. In Proceedings of the Cryptographic Hardware and Embedded Systems (CHES 2010) (pp. 294\u2013305).","DOI":"10.1007\/978-3-642-15031-9_20"},{"key":"ijsse.2013100101-41","unstructured":"Wenzel-Benner, C., Gr\u00e4f, J., Pham, J., & Kaps, J.-P. (2012). SHA3 results - XBX: eXternal benchmarking eXtension. Retrieved December 29, 2012, from http:\/\/xbx.das-labor.org\/trac\/wiki\/Sha3Results"},{"key":"ijsse.2013100101-42","doi-asserted-by":"crossref","unstructured":"Wolf, M., Weimerskirch, A., & Paar, C. (2006). Secure in-vehicle communication. In Proceedings of the Embedded Security in Cars Securing Current and Future Automotive IT Applications. Springer Verlag.","DOI":"10.1007\/3-540-28428-1_6"},{"key":"ijsse.2013100101-43","unstructured":"Wu, H. (2011). The hash function JH. Submission to NIST (round 3)."}],"container-title":["International Journal of Secure Software Engineering"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.igi-global.com\/viewtitle.aspx?TitleId=101890","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,7]],"date-time":"2019-08-07T19:42:03Z","timestamp":1565206923000},"score":1,"resource":{"primary":{"URL":"http:\/\/services.igi-global.com\/resolvedoi\/resolve.aspx?doi=10.4018\/ijsse.2013100101"}},"subtitle":[""],"short-title":[],"issued":{"date-parts":[[2013,10]]},"references-count":44,"journal-issue":{"issue":"4"},"URL":"https:\/\/doi.org\/10.4018\/ijsse.2013100101","relation":{},"ISSN":["1947-3036","1947-3044"],"issn-type":[{"value":"1947-3036","type":"print"},{"value":"1947-3044","type":"electronic"}],"subject":[],"published":{"date-parts":[[2013,10]]}}}