{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,6]],"date-time":"2025-02-06T05:26:11Z","timestamp":1738819571500,"version":"3.37.0"},"reference-count":23,"publisher":"Academy Publisher","issue":"3","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["JNW"],"DOI":"10.4304\/jnw.7.3.441-449","type":"journal-article","created":{"date-parts":[[2012,3,28]],"date-time":"2012-03-28T20:44:05Z","timestamp":1332967445000},"source":"Crossref","is-referenced-by-count":7,"title":["A Highly Flexible LDPC Decoder using Hierarchical Quasi-Cyclic Matrix with Layered Permutation"],"prefix":"10.4304","volume":"7","author":[{"given":"Vikram Arkalgud","family":"Chandrasetty","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Syed Mahfuzul","family":"Aziz","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"2838","published-online":{"date-parts":[[2012,3,1]]},"reference":[{"doi-asserted-by":"publisher","key":"ref1","DOI":"10.1049\/el:19970362"},{"doi-asserted-by":"publisher","key":"ref2","DOI":"10.1109\/ICCIT.2009.5407173"},{"doi-asserted-by":"publisher","key":"ref3","DOI":"10.1109\/SIPS.2007.4387554"},{"issue":"no. 1","key":"ref4","first-page":"36","article-title":"FPGA Implementation of a LDPC Decoder using a Reduced Complexity Message Passing Algorithm","volume":"6","author":"Chandrasetty","year":"2011","journal-title":"Journal of Networks, Academy Publisher"},{"key":"ref5","first-page":"445","article-title":"Analysis of Performance and Implementation Complexity of Simplified Algorithms for Decoding Low-Density Parity- Check codes","volume-title":"Proc. of the IEEE Globecom Workshop on Complex and Communication Networks","author":"Chandrasetty","year":"2010"},{"key":"ref6","first-page":"2573","article-title":"Low-density paritycheck code constructions for hardware implementation","volume-title":"Proc. of the IEEE International Conference on Communications","author":"Liao","year":"2004"},{"key":"ref7","first-page":"982","article-title":"A solution for memory collision in semi-parallel FPGA-based LDPC decoder design","volume-title":"Proc. of the 41st Asilomar Conference on Signals, Systems and Computers","author":"Zarubica","year":"2007"},{"key":"ref8","first-page":"825","article-title":"Low density parity check codes: construction based on finite geometries","volume-title":"Proc. of the IEEE Global Telecommunications Conference","author":"Kou"},{"key":"ref9","first-page":"1649","article-title":"A High Throughput H-QC LDPC Decoder","volume-title":"Proc. of the IEEE International Symposium on Circuits and Systems","author":"Yi-Hsing","year":"2007"},{"key":"ref10","first-page":"485","article-title":"Multilevel Structured Low-Density Parity-Check Codes for AWGN and Rayleigh Channels","volume-title":"Proc. of the IEEE International Conference on Communications","author":"Bonello","year":"2008"},{"key":"ref11","first-page":"131","article-title":"Construction of a Multi-Level Hierarchical Quasi-Cyclic Matrix with Layered Permutation for Partially-Parallel LDPC Decoders","volume-title":"Proc. of the 13th International Conference on Computers and Information Technology","author":"Chandrasetty","year":"2010"},{"key":"ref12","first-page":"995","article-title":"Progressive edge-growth Tanner graphs","volume-title":"Proc. of the IEEE Global Telecommunications Conference","author":"Xiao-Yu","year":"2001"},{"doi-asserted-by":"publisher","key":"ref13","DOI":"10.1109\/LCOMM.2004.839612"},{"key":"ref14","first-page":"1506","article-title":"Partial-parallel decoder architecture for quasi-cyclic non-binary LDPC codes","volume-title":"Proc. of the International Conference on Acoustics Speech and Signal Processing","author":"Zhang","year":"2010"},{"key":"ref15","first-page":"1990","article-title":"A class of good quasi-cyclic low-density parity check codes based on progressive edge growth graph","volume-title":"Proc. of the 38th Asilomar Conference on Signals, Systems and Computers","author":"Zongwang","year":"2004"},{"doi-asserted-by":"publisher","key":"ref16","DOI":"10.1109\/TCOMM.2008.060362"},{"doi-asserted-by":"publisher","key":"ref17","DOI":"10.1109\/TCSI.2005.862074"},{"doi-asserted-by":"publisher","key":"ref18","DOI":"10.1109\/FCCM.2008.13"},{"key":"ref19","first-page":"1","article-title":"Efficient quantization schemes for LDPC decoders","volume-title":"Proc. of the IEEE Military Communications Conference","author":"Zarubica","year":"2008"},{"doi-asserted-by":"publisher","key":"ref20","DOI":"10.1109\/TCSI.2008.922024"},{"doi-asserted-by":"publisher","key":"ref21","DOI":"10.1109\/TCSI.2009.2019395"},{"key":"ref22","first-page":"1192","article-title":"Decoding of Quasi-cyclic LDPC Codes Using an On-the-Fly Computation","volume-title":"Proc. of the 40th Asilomar Conference on Signals, Systems and Computers","author":"Gunnam"},{"doi-asserted-by":"publisher","key":"ref23","DOI":"10.1109\/CMC.2009.284"}],"container-title":["Journal of Networks"],"original-title":[],"deposited":{"date-parts":[[2025,2,5]],"date-time":"2025-02-05T17:13:06Z","timestamp":1738775586000},"score":1,"resource":{"primary":{"URL":"https:\/\/dblp.org\/db\/journals\/jnw\/index.html"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,3,1]]},"references-count":23,"journal-issue":{"issue":"3","published-online":{"date-parts":[[2012,3,1]]}},"URL":"https:\/\/doi.org\/10.4304\/jnw.7.3.441-449","relation":{},"ISSN":["1796-2056"],"issn-type":[{"type":"print","value":"1796-2056"}],"subject":[],"published":{"date-parts":[[2012,3,1]]}}}