{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T23:43:43Z","timestamp":1725666223351},"reference-count":0,"publisher":"ECMS","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2023,6,23]]},"abstract":"<jats:p>Instruction decoders are indispensable components of instruction set simulators and processor toolchains. The lengthy and elaborate manual implementation of decoders can be greatly alleviated by decoder generation tools. These need to handle the rising complexity of modern instruction sets, notably irregularities such as non-uniform opcodes and logic propositions on bit fields. In addition, decoder generators need to provide cost-optimized solutions, as the efficiency of the decoding module can have a substantial effect on the overall performance. This paper analyzes five published algorithms for decoder generators from two perspectives: First, in terms of functionality, we systematically assess how each tool handles different properties of modern instruction sets, highlighting properties that are challenging, unhandled by current algorithms or even result in functionally erroneous decoders. Second, we challenge seemingly intuitive definitions of decoder optimality using a sophisticated model of decision tree cost. We validate this analytical model against an experimental performance evaluation of generated decoders for SPARC, MIPS32 and ARMv7 platforms. For our analysis, we implemented all five algorithms after correcting the discovered conceptual errors and extending them to handle the above-mentioned ISAs. Our work reveals that state-of-the-art decoder generation tools are unable to fully and correctly handle complex ISAs and adopt an erroneous notion of optimality.<\/jats:p>","DOI":"10.7148\/2023-0262","type":"proceedings-article","created":{"date-parts":[[2023,8,16]],"date-time":"2023-08-16T11:46:57Z","timestamp":1692186417000},"page":"262-269","source":"Crossref","is-referenced-by-count":0,"title":["Functional Analysis And Performance Evaluation Of Decoder Decision Tree Generation Algorithms"],"prefix":"10.7148","author":[{"given":"Lillian","family":"Tadros","sequence":"first","affiliation":[]}],"member":"4144","published-online":{"date-parts":[[2023,6,23]]},"event":{"name":"37th ECMS International Conference on Modelling and Simulation"},"container-title":["ECMS 2023 Proceedings edited by Enrico Vicario, Romeo Bandinelli, Virginia Fani, Michele Mastroianni"],"original-title":[],"deposited":{"date-parts":[[2023,8,16]],"date-time":"2023-08-16T11:47:12Z","timestamp":1692186432000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.scs-europe.net\/dlib\/2023\/2023-0262.html"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,6,23]]},"references-count":0,"URL":"https:\/\/doi.org\/10.7148\/2023-0262","relation":{},"subject":[],"published":{"date-parts":[[2023,6,23]]}}}